公开(公告)号：US20080073730A1

公开(公告)日：2008-03-27

申请号：US11902404

申请日：2007-09-21

申请人： Deok-Hyung Lee ,  Sun-Ghil Lee ,  Jong-Ryeol Yoo ,  Byeong-Chan Lee ,  In-Soo Jung

发明人： Deok-Hyung Lee ,  Sun-Ghil Lee ,  Jong-Ryeol Yoo ,  Byeong-Chan Lee ,  In-Soo Jung

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7851 ,  H01L21/823431 ,  H01L29/66795

摘要： A method for forming a semiconductor device includes forming at least one gate electrode having a bent structure along a first direction on a semiconductor substrate, the gate electrode having first and second vertical portions, forming at least one semiconductor fin along a second direction on the semiconductor substrate, the semiconductor fin positioned between the first and second vertical portions of the gate electrode, forming a first epitaxial layer on the semiconductor fin, the first epitaxial layer including a source/drain impurity region, and forming a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including a contact impurity region.

摘要翻译： 一种形成半导体器件的方法包括：在半导体衬底上沿着第一方向形成具有弯曲结构的至少一个栅电极，所述栅极具有第一和第二垂直部分，在半导体上沿着第二方向形成至少一个半导体鳍片 衬底，所述半导体鳍片位于所述栅电极的所述第一和第二垂直部分之间，在所述半导体鳍片上形成第一外延层，所述第一外延层包括源/漏杂质区，以及在所述第一外延层上形成第二外延层 层，第二外延层包括接触杂质区。

公开(公告)号：US06900102B2

公开(公告)日：2005-05-31

申请号：US10773022

申请日：2004-02-05

申请人： Byeong-Chan Lee ,  Si-Young Choi ,  Jong-Ryeol Yoo ,  Deok-Hyung Lee ,  In-Soo Jung

发明人： Byeong-Chan Lee ,  Si-Young Choi ,  Jong-Ryeol Yoo ,  Deok-Hyung Lee ,  In-Soo Jung

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/786

CPC分类号： H01L29/78648 ,  H01L21/823437 ,  H01L27/108 ,  H01L27/10814 ,  H01L27/10873 ,  H01L29/78645

摘要： A double gate electrode for a field effect transistor is fabricated by forming in a substrate, a trench and a tunnel that extends from a sidewall of the trench parallel to the substrate. An insulating coating is formed inside the tunnel. A bottom gate electrode is formed within the insulating coating inside the tunnel. An insulating layer is formed on the substrate and a top gate electrode is formed on the insulating layer opposite the bottom gate electrode.

摘要翻译： 用于场效应晶体管的双栅极通过在衬底，沟槽和从沟槽的侧壁平行于衬底延伸的隧道中形成来制造。 在隧道内形成绝缘涂层。 底部栅电极形成在隧道内部的绝缘涂层内。 在衬底上形成绝缘层，并且在与栅电极相对的绝缘层上形成顶栅电极。

公开(公告)号：US07511340B2

公开(公告)日：2009-03-31

申请号：US11779477

申请日：2007-07-18

申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Chul-Sung Kim ,  In-Soo Jung ,  Jong-Ryeol Yoo

发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Chul-Sung Kim ,  In-Soo Jung ,  Jong-Ryeol Yoo

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L27/10888 ,  H01L21/28525 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76895 ,  H01L23/485 ,  H01L27/10894 ,  H01L2924/0002 ,  Y10S257/90 ,  H01L2924/00

摘要： Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate structures and have heights lower than the heights of the gate structures. Second spacers are disposed on sidewalls of the first spacers and on exposed sidewalls of the first contact pads. Second contact pads are disposed on the first contact pads.

摘要翻译： 半导体器件在半导体衬底上具有栅极结构，在相应栅极结构的侧壁上具有第一间隔物。 第一接触垫位于栅极结构之间并且具有低于栅极结构的高度的高度。 第二间隔件设置在第一间隔件的侧壁和第一接触垫的暴露的侧壁上。 第二接触垫设置在第一接触垫上。

公开(公告)号：US07338867B2

公开(公告)日：2008-03-04

申请号：US10747925

申请日：2003-12-30

申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Chul-Sung Kim ,  In-Soo Jung ,  Jong-Ryeol Yoo

发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Chul-Sung Kim ,  In-Soo Jung ,  Jong-Ryeol Yoo

IPC分类号： H01L21/336 ,  H01L21/4763

CPC分类号： H01L27/10888 ,  H01L21/28525 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76895 ,  H01L23/485 ,  H01L27/10894 ,  H01L2924/0002 ,  Y10S257/90 ,  H01L2924/00

摘要： Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate structures and have heights lower than the heights of the gate structures. Second spacers are disposed on sidewalls of the first spacers and on exposed sidewalls of the first contact pads. Second contact pads are disposed on the first contact pads.

摘要翻译： 半导体器件在半导体衬底上具有栅极结构，在相应栅极结构的侧壁上具有第一间隔物。 第一接触垫位于栅极结构之间并且具有低于栅极结构的高度的高度。 第二间隔件设置在第一间隔件的侧壁和第一接触垫的暴露的侧壁上。 第二接触垫设置在第一接触垫上。

公开(公告)号：US20070257324A1

公开(公告)日：2007-11-08

申请号：US11779477

申请日：2007-07-18

申请人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Chul-Sung Kim ,  In-Soo Jung ,  Jong-Ryeol Yoo

发明人： Deok-Hyung Lee ,  Si-Young Choi ,  Byeong-Chan Lee ,  Chul-Sung Kim ,  In-Soo Jung ,  Jong-Ryeol Yoo

IPC分类号： H01L27/088

CPC分类号： H01L27/10888 ,  H01L21/28525 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76895 ,  H01L23/485 ,  H01L27/10894 ,  H01L2924/0002 ,  Y10S257/90 ,  H01L2924/00

摘要： Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate structures and have heights lower than the heights of the gate structures. Second spacers are disposed on sidewalls of the first spacers and on exposed sidewalls of the first contact pads. Second contact pads are disposed on the first contact pads.

摘要翻译： 半导体器件在半导体衬底上具有栅极结构，在相应栅极结构的侧壁上具有第一间隔物。 第一接触垫位于栅极结构之间并且具有低于栅极结构的高度的高度。 第二间隔件设置在第一间隔件的侧壁和第一接触垫的暴露的侧壁上。 第二接触垫设置在第一接触垫上。

公开(公告)号：US07998851B2

公开(公告)日：2011-08-16

申请号：US12715599

申请日：2010-03-02

申请人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Sun-Ghil Lee ,  In-Soo Jung ,  Young-Eun Lee ,  Deok-Hyung Lee

发明人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Sun-Ghil Lee ,  In-Soo Jung ,  Young-Eun Lee ,  Deok-Hyung Lee

IPC分类号： H01L21/36

CPC分类号： H01L29/7842 ,  H01L21/823425 ,  H01L21/823475 ,  H01L27/0688

摘要： A semiconductor device includes an inorganic insulating layer on a semiconductor substrate, a contact plug that extends through the inorganic insulating layer to contact the semiconductor substrate and a stress buffer spacer disposed between the node contact plug and the inorganic insulating layer. The device further includes a thin-film transistor (TFT) disposed on the inorganic insulating layer and having a source/drain region extending along the inorganic insulating layer to contact the contact plug. The device may further include an etch stop layer interposed between the inorganic insulating layer and the semiconductor substrate.

摘要翻译： 半导体器件包括半导体衬底上的无机绝缘层，延伸穿过无机绝缘层以接触半导体衬底的接触插塞和设置在节点接触插塞和无机绝缘层之间的应力缓冲间隔件。 该器件还包括设置在无机绝缘层上并具有沿着无机绝缘层延伸以接触接触插塞的源极/漏极区域的薄膜晶体管（TFT）。 该器件还可以包括插入无机绝缘层和半导体衬底之间的蚀刻停止层。

公开(公告)号：US07393700B2

公开(公告)日：2008-07-01

申请号：US11208490

申请日：2005-08-22

申请人： Sun-Ghil Lee ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Deok-Hyung Lee ,  In-Soo Jung ,  Young-Eun Lee

发明人： Sun-Ghil Lee ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Deok-Hyung Lee ,  In-Soo Jung ,  Young-Eun Lee

IPC分类号： H01L21/302

CPC分类号： H01L29/66636 ,  H01L21/3065 ,  H01L21/32135 ,  H01L29/165 ,  H01L29/66628

摘要： Methods of etching a semiconductor substrate may include providing a first gas that is chemically reactive with respect to the semiconductor substrate, and while providing the first gas, providing a second gas different than the first gas. More particularly, a molecule of the second gas may include a hydrogen atom, and the second gas may lower a temperature at which the first gas chemically reacts with the semiconductor substrate. The mixture of the first and second gases may be provided adjacent the semiconductor substrate to etch the semiconductor substrate.

摘要翻译： 蚀刻半导体衬底的方法可以包括提供相对于半导体衬底具有化学反应性的第一气体，并且在提供第一气体的同时，提供不同于第一气体的第二气体。 更具体地，第二气体的分子可以包括氢原子，第二气体可以降低第一气体与半导体衬底发生化学反应的温度。 第一和第二气体的混合物可以设置在邻近半导体衬底处以蚀刻半导体衬底。

公开(公告)号：US20060057821A1

公开(公告)日：2006-03-16

申请号：US11208490

申请日：2005-08-22

申请人： Sun-Ghil Lee ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Deok-Hyung Lee ,  In-Soo Jung ,  Young-Eun Lee

发明人： Sun-Ghil Lee ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Deok-Hyung Lee ,  In-Soo Jung ,  Young-Eun Lee

IPC分类号： H01L21/30

CPC分类号： H01L29/66636 ,  H01L21/3065 ,  H01L21/32135 ,  H01L29/165 ,  H01L29/66628

摘要： Methods of etching a semiconductor substrate may include providing a first gas that is chemically reactive with respect to the semiconductor substrate, and while providing the first gas, providing a second gas different than the first gas. More particularly, a molecule of the second gas may include a hydrogen atom, and the second gas may lower a temperature at which the first gas chemically reacts with the semiconductor substrate. The mixture of the first and second gases may be provided adjacent the semiconductor substrate to etch the semiconductor substrate.

摘要翻译： 蚀刻半导体衬底的方法可以包括提供相对于半导体衬底具有化学反应性的第一气体，并且在提供第一气体的同时，提供不同于第一气体的第二气体。 更具体地，第二气体的分子可以包括氢原子，第二气体可以降低第一气体与半导体衬底发生化学反应的温度。 第一和第二气体的混合物可以设置在邻近半导体衬底处以蚀刻半导体衬底。

公开(公告)号：US20050248035A1

公开(公告)日：2005-11-10

申请号：US11092524

申请日：2005-03-29

申请人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Sun-Ghil Lee ,  In-Soo Jung ,  Young-Eun Lee ,  Deok-Hyung Lee

发明人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Sun-Ghil Lee ,  In-Soo Jung ,  Young-Eun Lee ,  Deok-Hyung Lee

IPC分类号： H01L21/28 ,  H01L21/8234 ,  H01L23/48 ,  H01L23/52 ,  H01L27/06 ,  H01L29/40

CPC分类号： H01L29/7842 ,  H01L21/823425 ,  H01L21/823475 ,  H01L27/0688

摘要： A semiconductor device includes an inorganic insulating layer on a semiconductor substrate, a contact plug that extends through the inorganic insulating layer to contact the semiconductor substrate and a stress buffer spacer disposed between the node contact plug and the inorganic insulating layer. The device further includes a thin-film transistor (TFT) disposed on the inorganic insulating layer and having a source/drain region extending along the inorganic insulating layer to contact the contact plug. The device may further include an etch stop layer interposed between the inorganic insulating layer and the semiconductor substrate.

摘要翻译： 半导体器件包括半导体衬底上的无机绝缘层，延伸穿过无机绝缘层以接触半导体衬底的接触插塞和设置在节点接触插塞和无机绝缘层之间的应力缓冲间隔件。 该器件还包括设置在无机绝缘层上并具有沿着无机绝缘层延伸以接触接触插塞的源极/漏极区域的薄膜晶体管（TFT）。 该器件还可以包括插入无机绝缘层和半导体衬底之间的蚀刻停止层。

公开(公告)号：US08481416B2

公开(公告)日：2013-07-09

申请号：US13205461

申请日：2011-08-08

申请人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Sun-Ghil Lee ,  In-Soo Jung ,  Young-Eun Lee ,  Deok-Hyung Lee

发明人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Sun-Ghil Lee ,  In-Soo Jung ,  Young-Eun Lee ,  Deok-Hyung Lee

IPC分类号： H01L21/20

CPC分类号： H01L29/7842 ,  H01L21/823425 ,  H01L21/823475 ,  H01L27/0688

摘要： A semiconductor device includes an inorganic insulating layer on a semiconductor substrate, a contact plug that extends through the inorganic insulating layer to contact the semiconductor substrate and a stress buffer spacer disposed between the node contact plug and the inorganic insulating layer. The device further includes a thin-film transistor (TFT) disposed on the inorganic insulating layer and having a source/drain region extending along the inorganic insulating layer to contact the contact plug. The device may further include an etch stop layer interposed between the inorganic insulating layer and the semiconductor substrate.

摘要翻译： 半导体器件包括半导体衬底上的无机绝缘层，延伸穿过无机绝缘层以接触半导体衬底的接触插塞和设置在节点接触插塞和无机绝缘层之间的应力缓冲间隔件。 该器件还包括设置在无机绝缘层上并具有沿着无机绝缘层延伸以接触接触插塞的源极/漏极区域的薄膜晶体管（TFT）。 该器件还可以包括插入无机绝缘层和半导体衬底之间的蚀刻停止层。