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    IMPEDANCE MEASUREMENT DEVICE AND METHOD
    1.
    发明申请
    IMPEDANCE MEASUREMENT DEVICE AND METHOD 有权
    阻抗测量装置和方法

    公开(公告)号：US20130271155A1

    公开(公告)日：2013-10-17

    申请号：US13626434

    申请日：2012-09-25

    申请人： Dermot O'Keeffe ,  Donal Bourke ,  David Harty ,  Tudor Vinereanu ,  Colin Lyden

    发明人： Dermot O'Keeffe ,  Donal Bourke ,  David Harty ,  Tudor Vinereanu ,  Colin Lyden

    IPC分类号： G01R27/02

    CPC分类号： G01R27/28

    摘要： A digital sine wave may be converted to an analog signal at a digital to analog converter (DAC). The converted analog signal may be supplied to a device and an analog return signal from the device may be passed through a relaxed anti-aliasing filter and converted to digital code words at an analog to digital converter (ADC). An impedance may be calculated from the results of a Fourier analysis of the digital code words. The ADC and DAC clock frequencies may be asynchronous, independently variable, and have a greatest common factor of 1. The clock frequencies of the ADC and/or DAC may be adjusted to change a location of images in the ADC spectrum. By using these different, adjustable clock frequencies for the ADC and the DAC, an analog signal may have increased aliasing without introducing signal errors at a frequency of interest.

    摘要翻译： 数字正弦波可以在数模转换器（DAC）转换为模拟信号。 转换的模拟信号可以被提供给设备，并且来自设备的模拟返回信号可以通过松弛的抗混叠滤波器并且在模数转换器（ADC）处被转换成数字码字。 可以根据数字码字的傅立叶分析的结果来计算阻抗。 ADC和DAC时钟频率可以是异步的，可独立变化的，并且具有最大的共同因子1. ADC和/或DAC的时钟频率可以被调整以改变ADC频谱中图像的位置。 通过为ADC和DAC使用这些不同的可调时钟频率，模拟信号可能会增加混叠，而不会在感兴趣的频率下引入信号错误。

    Control Techniques for Motor Driven Systems
    3.
    发明申请
    Control Techniques for Motor Driven Systems 有权
    电机驱动系统的控制技术

    公开(公告)号：US20100201300A1

    公开(公告)日：2010-08-12

    申请号：US12572559

    申请日：2009-10-02

    申请人： Colin LYDEN ,  Javier Calpe-Maravilla ,  Mark Murphy ,  Eoin English ,  Denis Martin O'Connor ,  Tudor Vinereanu ,  Alan Cahill ,  Sean Brennan

    发明人： Colin LYDEN ,  Javier Calpe-Maravilla ,  Mark Murphy ,  Eoin English ,  Denis Martin O'Connor ,  Tudor Vinereanu ,  Alan Cahill ,  Sean Brennan

    IPC分类号： G05B13/02

    CPC分类号： G05B13/02 ,  G05B5/01 ,  H02P25/034

    摘要： Embodiments of the present invention provide a motor-driven mechanical system with a detection system to measure properties of a back channel and derive oscillatory characteristics of the mechanical system. Uses of the detection system may include calculating the resonant frequency of the mechanical system and a threshold drive DTH required to move the mechanical system from the starting mechanical stop position. System manufacturers often do not know the resonant frequency and DTH of their mechanical systems precisely. Therefore, the calculation of the specific mechanical system's resonant frequency and DTH rather than depending on the manufacturer's expected values improves precision in the mechanical system use. The backchannel calculations may be used either to replace or to improve corresponding pre-programmed values.

    摘要翻译： 本发明的实施例提供一种具有检测系统的电机驱动机械系统，用于测量后通道的性质并导出机械系统的振荡特性。 检测系统的使用可以包括计算机械系统的谐振频率和将机械系统从起动机械停止位置移动所需的阈值驱动DTH。 系统制造商往往不了解其机械系统的谐振频率和DTH。 因此，特定机械系统的谐振频率和DTH的计算而不是依赖于制造商的预期值来提高机械系统使用的精度。 反向通道计算可用于替换或改善相应的预编程值。

    Digital-to-analog converter structures
    4.
    发明申请
    Digital-to-analog converter structures 有权

    公开(公告)号：US20060061500A1

    公开(公告)日：2006-03-23

    申请号：US11048374

    申请日：2005-02-01

    申请人： Patrick Kirby ,  Colin Lyden ,  Tudor Vinereanu

    发明人： Patrick Kirby ,  Colin Lyden ,  Tudor Vinereanu

    IPC分类号： H03M1/66

    CPC分类号： H03M1/1057 ,  H03M1/785

    摘要： A DAC architecture is described. The architecture is specifically adapted to provided an analog voltage output based on a digital input word. The architecture includes a resistor ladder configuration sub-divisible into a first component, adapted to convert a lower part of the input word, and a second component adapted to convert an upper part of the input word. The DAC is calibrated such that the first component can be used to tune the output of the second component on selection of specific segment from the second component.

    Control techniques for motor driven systems
    5.
    发明授权
    Control techniques for motor driven systems 有权
    电机驱动系统的控制技术

    公开(公告)号：US08766565B2

    公开(公告)日：2014-07-01

    申请号：US12572559

    申请日：2009-10-02

    申请人： Colin Lyden ,  Javier Calpe-Maravilla ,  Mark Murphy ,  Eoin English ,  Denis Martin O'Connor ,  Tudor Vinereanu ,  Alan Cahill ,  Sean Brennan

    发明人： Colin Lyden ,  Javier Calpe-Maravilla ,  Mark Murphy ,  Eoin English ,  Denis Martin O'Connor ,  Tudor Vinereanu ,  Alan Cahill ,  Sean Brennan

    IPC分类号： H02P7/00 ,  H02N2/00 ,  G05B11/01 ,  G05B13/00 ,  G05B11/32

    CPC分类号： G05B13/02 ,  G05B5/01 ,  H02P25/034

    摘要： Embodiments of the present invention provide a motor-driven mechanical system with a detection system to measure properties of a back channel and derive oscillatory characteristics of the mechanical system. Uses of the detection system may include calculating the resonant frequency of the mechanical system and a threshold drive DTH required to move the mechanical system from the starting mechanical stop position. System manufacturers often do not know the resonant frequency and DTH of their mechanical systems precisely. Therefore, the calculation of the specific mechanical system's resonant frequency and DTH rather than depending on the manufacturer's expected values improves precision in the mechanical system use. The backchannel calculations may be used either to replace or to improve corresponding pre-programmed values.

    摘要翻译： 本发明的实施例提供一种具有检测系统的电机驱动机械系统，用于测量后通道的性质并导出机械系统的振荡特性。 检测系统的使用可以包括计算机械系统的谐振频率和将机械系统从起动机械停止位置移动所需的阈值驱动DTH。 系统制造商往往不了解其机械系统的谐振频率和DTH。 因此，特定机械系统的谐振频率和DTH的计算而不是依赖于制造商的预期值来提高机械系统使用的精度。 反向通道计算可用于替换或改善相应的预编程值。

    SIGNAL GENERATION USING DAC HAVING SELECTIVELY SWITCHED REGISTERS STORING OUTPUT VALUES
    7.
    发明申请
    SIGNAL GENERATION USING DAC HAVING SELECTIVELY SWITCHED REGISTERS STORING OUTPUT VALUES 有权
    使用具有选择性切换寄存器的DAC的信号生成存储输出值

    公开(公告)号：US20050007265A1

    公开(公告)日：2005-01-13

    申请号：US10866309

    申请日：2004-06-10

    申请人： Donal Geraghty ,  Albert O'Grady ,  Tudor Vinereanu

    发明人： Donal Geraghty ,  Albert O'Grady ,  Tudor Vinereanu

    IPC分类号： G06F1/025 ,  G06F1/03 ,  H03K4/02 ,  H03M1/66

    CPC分类号： G06F1/025 ,  G06F1/0321 ,  H03K4/026

    摘要： A signal generator (1) for generating a square waveform analog voltage output signal comprises an on-chip DAC (12) which outputs the analog voltage signal on an output terminal (5). On-chip first and second programmable registers (9,10) store first and second digital words which correspond to the maximum and minimum voltage values of the analog output signal. An on-chip switch circuit (15) selectively and alternately switches the first and second registers (9,10) to an on-chip DAC register (17) from which the respective first and second digital words are loaded into the DAC (12) in response to a load DAC signal generated by a control circuit (14). The load DAC signal is generated in response to an externally generated LDAC signal in the form of a clock signal which is applied to an LDAC terminal (22). A flip-flop (19) in response to the load DAC signal outputs a control signal on a control line (25) for alternately switching the first and second registers (9,10) to the DAC register (17). The frequency of the analog output signal is determined by the frequency of the LDAC signal, and is half the frequency of the LDAC signal.

    摘要翻译： 用于产生方波模拟电压输出信号的信号发生器（1）包括在输出端（5）上输出模拟电压信号的片上DAC（12）。 片上第一和第二可编程寄存器（9,10）存储对应于模拟输出信号的最大和最小电压值的第一和第二数字字。 片上开关电路（15）选择性地并交替地将第一和第二寄存器（9,10）切换到片上DAC寄存器（17），相应的第一和第二数字字从该寄存器加载到DAC（12）中， 响应于由控制电路（14）产生的负载DAC信号。 响应于施加到LDAC端子（22）的时钟信号形式的外部产生的LDAC信号产生负载DAC信号。 响应于负载DAC信号的触发器（19）在控制线（25）上输出用于交替地将第一和第二寄存器（9,10）切换到DAC寄存器（17）的控制信号。 模拟输出信号的频率由LDAC信号的频率决定，为LDAC信号频率的一半。

    System and method for digital compensation of digital to analog and analog to digital converters
    9.
    发明申请
    System and method for digital compensation of digital to analog and analog to digital converters 有权
    数模转换器和模数转换器数字补偿的系统和方法

    公开(公告)号：US20060125669A1

    公开(公告)日：2006-06-15

    申请号：US10528682

    申请日：2003-09-24

    申请人： Dennis Dempsey ,  Thomas O'Dwyer ,  Oliver Brennan ,  Alan Walsh ,  Tudor Vinereanu

    发明人： Dennis Dempsey ,  Thomas O'Dwyer ,  Oliver Brennan ,  Alan Walsh ,  Tudor Vinereanu

    IPC分类号： H03M1/66

    CPC分类号： H03M1/1042 ,  H03M1/1038 ,  H03M1/12 ,  H03M1/66

    摘要： The present invention relates to a system and method for digitally compensating signal converters and in particular a digital to analog converter which receives digital input data for a digital to analog converter and supplies anti-function digital coefficients derived from the error function of the digital to analog converter and corresponding to the digital input data and applies the anti-function digital coefficients to the digital input data to pre-condition the digital input data to compensate for the error function of the digital to analog converter. The invention also extends to analog to digital converters.

    摘要翻译： 本发明涉及一种用于数字补偿信号转换器的系统和方法，特别是一种数模转换器，其接收数模转换器的数字输入数据，并提供从数模转换器的误差函数导出的反功能数字系数 转换器，并对应于数字输入数据，并将反功能数字系数应用于数字输入数据，以预设数字输入数据，以补偿数模转换器的误差功能。 本发明还扩展到模数转换器。

    Method and apparatus for device interface
    10.
    发明授权
    Method and apparatus for device interface 有权
    设备接口的方法和装置

    公开(公告)号：US06823416B1

    公开(公告)日：2004-11-23

    申请号：US09837659

    申请日：2001-04-18

    申请人： Dennis A. Dempsey ,  Thomas G. O'Dwyer ,  Oliver James Brennan ,  Helen Stapleton ,  Alan Walsh ,  Tudor Vinereanu

    发明人： Dennis A. Dempsey ,  Thomas G. O'Dwyer ,  Oliver James Brennan ,  Helen Stapleton ,  Alan Walsh ,  Tudor Vinereanu

    IPC分类号： G06F1300

    CPC分类号： H03M1/662

    摘要： A method for communicating between a controller and a device with double-buffered inputs comprises the steps of providing one or more communication paths for exchanging data between the controller and the device, providing a data transfer control signal from the controller to the device for transferring input data from one or more input registers into one or more latchable data registers, and providing a data transfer delay signal from the device to the controller, wherein, in a first logic state, the data transfer delay signal prevents transfer of input data from the input registers into the latchable data registers until after a transition to a second logic state occurs on the data transfer delay signal. An apparatus for communicating between a controller and a device is also described.

    摘要翻译： 一种用于在具有双缓冲输入的控制器和设备之间进行通信的方法包括以下步骤：提供用于在控制器和设备之间交换数据的一个或多个通信路径，从控制器向设备提供数据传输控制信号以传送输入 从一个或多个输入寄存器到一个或多个可锁定数据寄存器的数据，以及从该设备向控制器提供数据传输延迟信号，其中在第一逻辑状态下，数据传输延迟信号防止输入数据从输入 注册到可锁存数据寄存器中，直到在数据传输延迟信号上发生转换到第二逻辑状态。 还描述了用于在控制器和设备之间进行通信的装置。