Method and apparatus for device interface
    3.
    发明授权
    Method and apparatus for device interface 有权
    设备接口的方法和装置

    公开(公告)号:US06823416B1

    公开(公告)日:2004-11-23

    申请号:US09837659

    申请日:2001-04-18

    IPC分类号: G06F1300

    CPC分类号: H03M1/662

    摘要: A method for communicating between a controller and a device with double-buffered inputs comprises the steps of providing one or more communication paths for exchanging data between the controller and the device, providing a data transfer control signal from the controller to the device for transferring input data from one or more input registers into one or more latchable data registers, and providing a data transfer delay signal from the device to the controller, wherein, in a first logic state, the data transfer delay signal prevents transfer of input data from the input registers into the latchable data registers until after a transition to a second logic state occurs on the data transfer delay signal. An apparatus for communicating between a controller and a device is also described.

    摘要翻译: 一种用于在具有双缓冲输入的控制器和设备之间进行通信的方法包括以下步骤:提供用于在控制器和设备之间交换数据的一个或多个通信路径,从控制器向设备提供数据传输控制信号以传送输入 从一个或多个输入寄存器到一个或多个可锁定数据寄存器的数据,以及从该设备向控制器提供数据传输延迟信号,其中在第一逻辑状态下,数据传输延迟信号防止输入数据从输入 注册到可锁存数据寄存器中,直到在数据传输延迟信号上发生转换到第二逻辑状态。 还描述了用于在控制器和设备之间进行通信的装置。

    Digital to analog converter
    4.
    发明授权
    Digital to analog converter 有权
    数模转换器

    公开(公告)号:US07136002B2

    公开(公告)日:2006-11-14

    申请号:US11107094

    申请日:2005-04-15

    IPC分类号: H03M1/66

    CPC分类号: H03M1/682 H03M1/765

    摘要: The present invention provides an improved Digital to Analog Converter (DAC) of the switched dual string DAC type, which saves on chip surface area, reduces the number of resistors and implementation cost, reduces the self capacitance and the device leakage currents of the circuit elements. The invention provides a guaranteed monotonic DAC architecture, which comprises a switching network for creating three states at a DAC transition node. In one embodiment the invention provides an unloaded state wherein a LSB DAC is de-coupled from a MSB DAC wherein the node between neighboring MSB DAC resistors is coupled to the DAC output. One of the advantages of creating the unloaded state is that the number of LSB DAC resistors is reduced as is normally the case in the prior art for a similar application.

    摘要翻译: 本发明提供了一种改进的数字到模拟转换器(DAC)的开关双串DAC类型,其节省了芯片表面面积,减少了电阻数量和实施成本,减少了电路元件的自身电容和器件漏电流 。 本发明提供了一种保证的单调DAC架构,其包括用于在DAC转换节点处产生三个状态的交换网络。 在一个实施例中,本发明提供一种无载状态,其中LSB DAC从MSB DAC去耦合,其中相邻MSB DAC电阻之间的节点耦合到DAC输出。 产生无负载状态的一个优点是像现有技术中类似应用的情况一样减少了LSB DAC电阻器的数量。

    Calibration control for pin electronics of automatic testing equipment
    5.
    发明授权
    Calibration control for pin electronics of automatic testing equipment 有权
    自动测试设备针脚电子校准控制

    公开(公告)号:US07489123B2

    公开(公告)日:2009-02-10

    申请号:US11296858

    申请日:2005-12-07

    IPC分类号: G01R31/28

    CPC分类号: G01R31/31924 G01R31/3191

    摘要: An integrated circuit for automatic calibration control of pin electronics is disclosed. The integrated circuit includes a substrate, and both pin electronics and a calibration circuit integral with the substrate. The calibration circuit is dedicated to a single channel of automatic testing equipment for a single pin of a device under test. Each sub-circuit of the pin electronics may include a replica output. The replica output is electrically coupled to the calibration circuit. The calibration circuit may include a multiplexor for receiving each of the replica outputs from the sub-circuits, such as a comparator, load and a driver, and for selectively switching between the replica outputs to determine calibration parameters for one or more levels of the sub-circuit. The calibration circuit includes a state machine capable of determining calibration parameters including offset and gain. After determining the calibration parameters, the state machine can compensate the one or more levels for each sub-circuit of the pin electronics based upon the calibration parameters.

    摘要翻译: 公开了一种用于引脚电子器件的自动校准控制的集成电路。 集成电路包括基板,以及两个引脚电子器件和与基板成一体的校准电路。 校准电路专用于被测设备的单个引脚的单通道自动测试设备。 引脚电子器件的每个子电路可以包括复制输出。 复制输出电耦合到校准电路。 校准电路可以包括多路复用器,用于从子电路(例如比较器,负载和驱动器)接收副本输出中的每一个,并且用于在复制输出之间选择性地切换以确定子级的一个或多个级别的校准参数 电路 校准电路包括能够确定包括偏移和增益的校准参数的状态机。 在确定校准参数之后,状态机可以基于校准参数来补偿针脚电子器件的每个子电路的一个或多个电平。

    Method and apparatus for compensating for temperature drift in semiconductor processes and circuitry
    6.
    发明授权
    Method and apparatus for compensating for temperature drift in semiconductor processes and circuitry 有权
    用于补偿半导体工艺和电路中的温度漂移的方法和装置

    公开(公告)号:US07543253B2

    公开(公告)日:2009-06-02

    申请号:US10680265

    申请日:2003-10-07

    IPC分类号: G06F17/50 H03K17/78 G05F3/20

    摘要: The present invention provides a method and apparatus for compensating for temperature effects in the operation of semiconductor processes circuitry, such as reference circuits. The method operates on the realization that the second order effects such as “curvature” in the reference voltage variation over a temperature range is removed. The reference voltage variation over a temperature range can be represented as a straight line. This method provides for the trimming of the absolute voltage by scaling the reference voltage at a first temperature to the desired value by a temperature independent voltage. Then, at a second temperature, the output voltage slope is corrected by adding or subtracting a voltage which is always zero at the first temperature.

    摘要翻译: 本发明提供了一种用于补偿诸如参考电路的半导体处理电路的操作中的温度效应的方法和装置。 该方法的作用是在温度范围内的参考电压变化中的诸如“曲率”之类的二阶效应被去除。 在温度范围内的参考电压变化可以表示为直线。 该方法通过将第一温度下的参考电压与温度无关的电压进行缩放来提供绝对电压的微调。 然后,在第二温度下,通过加法或减去在第一温度下始终为零的电压来校正输出电压斜率。

    Direct digital waveform synthesizer with DAC error correction
    7.
    发明授权
    Direct digital waveform synthesizer with DAC error correction 有权
    具有DAC错误校正的直接数字波形合成器

    公开(公告)号:US06489911B1

    公开(公告)日:2002-12-03

    申请号:US09974489

    申请日:2001-10-10

    申请人: Thomas G. O'Dwyer

    发明人: Thomas G. O'Dwyer

    IPC分类号: H03M184

    摘要: A direct digital waveform synthesiser with DAC error correction includes a digital to analog converter system for producing a desired output waveform and having between its digital and analog output a characteristic having a linear component and a non-linear component; and a phase to amplitude converter including a storage device responsive to phase inputs to provide to the digital to analog converter system amplitudes modified to compensate for the non-linear component of a characteristic of the digital to analog converter system.

    摘要翻译: 具有DAC误差校正的直接数字波形合成器包括用于产生期望的输出波形并且在其数字和模拟输出之间具有线性分量和非线性分量的特征的数模转换器系统; 以及相位到幅度转换器,其包括响应于相位输入的存储装置,以提供经修改的数模转换器系统幅度,以补偿数模转换器系统的特性的非线性分量。