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公开(公告)号：US20100084754A1
公开(公告)日：2010-04-08
申请号：US12591792
申请日：2009-12-01
申请人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
发明人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
IPC分类号： H01L25/065
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A semiconductor package which includes a first substrate having a pre-designed pattern formed thereon; a first chip mounted by a flip chip method on one side of the first substrate; a support formed to a predetermined thickness on an edge of the first substrate; an interposer having an edge thereof placed on the support, such that the interposer covers the first substrate and forms a cavity between the interposer and the first substrate, and having a pre-designed pattern formed respectively on both sides thereof; a via penetrating the support and the interposer; a second chip mounted on one side of the interposer facing the first substrate; a second substrate placed on the other side of the interposer with at least one conductive ball positioned in-between; and a third chip mounted on the second substrate.
摘要翻译： 一种半导体封装，其包括在其上形成有预先设计的图案的第一基板; 通过倒装芯片方法在所述第一基板的一侧上安装的第一芯片; 在所述第一基板的边缘上形成为预定厚度的支撑件; 插入器，其具有放置在支撑体上的边缘，使得所述插入件覆盖所述第一基板并在所述插入件与所述第一基板之间形成空腔，并且具有分别形成在其两侧的预先设计的图案; 穿过支撑件和插入件的通孔; 第二芯片，安装在所述插入器的面向所述第一基板的一侧上; 放置在所述插入件的另一侧上的第二衬底，其中至少一个导电球定位在其间; 以及安装在所述第二基板上的第三芯片。
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公开(公告)号：US20100087035A1
公开(公告)日：2010-04-08
申请号：US12591791
申请日：2009-12-01
申请人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
发明人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
IPC分类号： H01L21/60
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming at least one bump by performing soldering, on at least one predetermined position electrically connected with the pattern formed on the first substrate; forming a first molding by performing molding, such that the first molding covers the first substrate and the first chip; placing an interposer on the first molding; and placing a second substrate on the interposer, the second substrate having a second chip mounted thereon.
摘要翻译： 一种制造半导体封装的方法，包括通过倒装芯片方法将第一芯片安装在第一衬底上，所述第一衬底在其上形成预先设计的图案; 在与形成在第一基板上的图案电连接的至少一个预定位置上进行焊接而形成至少一个凸块; 通过进行模制来形成第一模制件，使得第一模塑件覆盖第一基板和第一芯片; 在第一次成型时放置插入件; 以及将第二衬底放置在所述插入件上，所述第二衬底具有安装在其上的第二芯片。
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公开(公告)号：US07875983B2
公开(公告)日：2011-01-25
申请号：US12591792
申请日：2009-12-01
申请人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
发明人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A semiconductor package which includes a first substrate having a pre-designed pattern formed thereon; a first chip mounted by a flip chip method on one side of the first substrate; a support formed to a predetermined thickness on an edge of the first substrate; an interposer having an edge thereof placed on the support, such that the interposer covers the first substrate and forms a cavity between the interposer and the first substrate, and having a pre-designed pattern formed respectively on both sides thereof; a via penetrating the support and the interposer; a second chip mounted on one side of the interposer facing the first substrate; a second substrate placed on the other side of the interposer with at least one conductive ball positioned in-between; and a third chip mounted on the second substrate.
摘要翻译： 一种半导体封装，其包括在其上形成有预先设计的图案的第一基板; 通过倒装芯片方法在所述第一基板的一侧上安装的第一芯片; 在所述第一基板的边缘上形成为预定厚度的支撑件; 插入器，其具有放置在支撑体上的边缘，使得所述插入件覆盖所述第一基板并在所述插入件与所述第一基板之间形成空腔，并且具有分别形成在其两侧的预先设计的图案; 穿过支撑件和插入件的通孔; 第二芯片，安装在所述插入器的面向所述第一基板的一侧上; 放置在所述插入件的另一侧上的第二衬底，其中至少一个导电球定位在其间; 以及安装在所述第二基板上的第三芯片。
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公开(公告)号：US20100087034A1
公开(公告)日：2010-04-08
申请号：US12591793
申请日：2009-12-01
申请人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
发明人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
IPC分类号： H01L21/60
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming a cavity by etching a center portion of a metal oxide layer; mounting a second chip inside the cavity; forming at least one via such that the via penetrates an edge of the metal oxide layer; placing the metal oxide layer on the first substrate such that the second chip and the first chip face each other; and placing a second substrate on the metal oxide layer, the second substrate having a third chip mounted thereon.
摘要翻译： 一种制造半导体封装的方法，包括通过倒装芯片方法将第一芯片安装在第一衬底上，所述第一衬底在其上形成预先设计的图案; 通过蚀刻金属氧化物层的中心部分形成空腔; 在腔内安装第二芯片; 形成至少一个通孔，使得所述通孔穿过所述金属氧化物层的边缘; 将所述金属氧化物层放置在所述第一基板上，使得所述第二芯片和所述第一芯片彼此面对; 以及将第二衬底放置在所述金属氧化物层上，所述第二衬底具有安装在其上的第三芯片。
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公开(公告)号：US08017437B2
公开(公告)日：2011-09-13
申请号：US12591791
申请日：2009-12-01
申请人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
发明人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming at least one bump by performing soldering, on at least one predetermined position electrically connected with the pattern formed on the first substrate; forming a first molding by performing molding, such that the first molding covers the first substrate and the first chip; placing an interposer on the first molding; and placing a second substrate on the interposer, the second substrate having a second chip mounted thereon.
摘要翻译： 一种制造半导体封装的方法，包括通过倒装芯片方法将第一芯片安装在第一衬底上，所述第一衬底在其上形成预先设计的图案; 在与形成在第一基板上的图案电连接的至少一个预定位置上进行焊接而形成至少一个凸块; 通过进行模制来形成第一模制件，使得第一模塑件覆盖第一基板和第一芯片; 在第一次成型时放置插入件; 以及将第二衬底放置在所述插入件上，所述第二衬底具有安装在其上的第二芯片。
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公开(公告)号：US07875497B2
公开(公告)日：2011-01-25
申请号：US12591793
申请日：2009-12-01
申请人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
发明人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming a cavity by etching a center portion of a metal oxide layer; mounting a second chip inside the cavity; forming at least one via such that the via penetrates an edge of the metal oxide layer; placing the metal oxide layer on the first substrate such that the second chip and the first chip face each other; and placing a second substrate on the metal oxide layer, the second substrate having a third chip mounted thereon.
摘要翻译： 一种制造半导体封装的方法，包括通过倒装芯片方法将第一芯片安装在第一衬底上，所述第一衬底在其上形成预先设计的图案; 通过蚀刻金属氧化物层的中心部分形成空腔; 在腔内安装第二芯片; 形成至少一个通孔，使得所述通孔穿过所述金属氧化物层的边缘; 将所述金属氧化物层放置在所述第一基板上，使得所述第二芯片和所述第一芯片彼此面对; 以及将第二衬底放置在所述金属氧化物层上，所述第二衬底具有安装在其上的第三芯片。
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公开(公告)号：US20080308950A1
公开(公告)日：2008-12-18
申请号：US12068867
申请日：2008-02-12
申请人： Do Jae Yoo , Young Do Kweon , Seog-Moon Choi , Burn-Sik Jang , Tae-Sung Jeong
发明人： Do Jae Yoo , Young Do Kweon , Seog-Moon Choi , Burn-Sik Jang , Tae-Sung Jeong
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A semiconductor package, which includes: a first substrate, on which a pre-designed pattern is formed; a first chip, mounted by a flip chip method on one side of the first substrate; a first molding, covering the first substrate and the first chip; a first via, which penetrates the first molding, and which is electrically connected with the pattern formed on the first substrate; an interposer, which is placed on the first molding, and on both sides of which a pre-designed pattern is formed respectively; a second via, penetrating the interposer and electrically connecting both sides of the interposer; a second substrate, placed on the interposer with at least one conductive ball positioned in-between, such that the second substrate is electrically connected with the pattern formed on the interposer; and a second chip mounted on the second substrate, can be used to improve heat release and increase the degree of integration.
摘要翻译： 一种半导体封装件，包括：第一衬底，其上形成预先设计的图案; 第一芯片，通过倒装芯片方法安装在第一基板的一侧上; 第一模制件，覆盖第一基板和第一芯片; 第一通孔，其穿过第一模制件，并且与形成在第一基板上的图案电连接; 插入器，其被放置在第一模制件上，并且其两侧分别形成预先设计的图案; 第二通孔，穿透插入器并电连接插入器的两侧; 第二衬底，放置在插入器上，其中至少一个导电球位于其间，使得第二衬底与形成在插入件上的图案电连接; 并且安装在第二基板上的第二芯片可用于改善散热并增加集成度。
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公开(公告)号：US07642656B2
公开(公告)日：2010-01-05
申请号：US12068867
申请日：2008-02-12
申请人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Burn-Sik Jang , Tae-Sung Jeong
发明人： Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Burn-Sik Jang , Tae-Sung Jeong
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2225/06517 , H01L2225/06541 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/19105 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A semiconductor package, which includes: a first substrate, on which a pre-designed pattern is formed; a first chip, mounted by a flip chip method on one side of the first substrate; a first molding, covering the first substrate and the first chip; a first via, which penetrates the first molding, and which is electrically connected with the pattern formed on the first substrate; an interposer, which is placed on the first molding, and on both sides of which a pre-designed pattern is formed respectively; a second via, penetrating the interposer and electrically connecting both sides of the interposer; a second substrate, placed on the interposer with at least one conductive ball positioned in-between, such that the second substrate is electrically connected with the pattern formed on the interposer; and a second chip mounted on the second substrate, can be used to improve heat release and increase the degree of integration.
摘要翻译： 一种半导体封装件，包括：第一衬底，其上形成预先设计的图案; 第一芯片，通过倒装芯片方法安装在第一基板的一侧上; 第一模制件，覆盖第一基板和第一芯片; 第一通孔，其穿过第一模制件，并且与形成在第一基板上的图案电连接; 插入器，其被放置在第一模制件上，并且其两侧分别形成预先设计的图案; 第二通孔，穿透插入器并电连接插入器的两侧; 第二基板，放置在插入件上，其中至少一个导电球定位在其间，使得第二基板与形成在插入件上的图案电连接; 并且安装在第二基板上的第二芯片可用于改善散热并增加集成度。
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公开(公告)号：US08064215B2
公开(公告)日：2011-11-22
申请号：US12230872
申请日：2008-09-05
申请人： Yul-Kyo Chung , Sung Yi , Soon-Gyu Yim , Seog-Moon Choi , Jin-Gu Kim , Young-Do Kweon
发明人： Yul-Kyo Chung , Sung Yi , Soon-Gyu Yim , Seog-Moon Choi , Jin-Gu Kim , Young-Do Kweon
IPC分类号： H05K1/18
CPC分类号： H05K1/162 , H01L23/3114 , H01L23/50 , H01L23/5389 , H01L23/642 , H01L24/25 , H01L2224/05001 , H01L2224/05548 , H01L2224/12105 , H01L2224/24227 , H01L2224/2518 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/14 , H01L2924/15311 , H01L2924/19015 , H01L2924/19041 , H05K1/185 , H05K3/4602 , H05K2201/09763 , H05K2201/10674 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor chip package and a printed circuit board having an embedded semiconductor chip package are disclosed. The semiconductor chip package may include a semiconductor chip that has at least one chip pad formed on one side, and a capacitor formed on the other side of the semiconductor chip.
摘要翻译： 公开了一种半导体芯片封装和具有嵌入式半导体芯片封装的印刷电路板。 半导体芯片封装可以包括在一侧形成有至少一个芯片焊盘的半导体芯片和形成在半导体芯片的另一侧上的电容器。
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公开(公告)号：US20090073667A1
公开(公告)日：2009-03-19
申请号：US12230872
申请日：2008-09-05
申请人： Yul-Kyo Chung , Sung Yi , Soon-Gyu Yim , Seog-Moon Choi , Jin-Gu Kim , Young-Do Kweon
发明人： Yul-Kyo Chung , Sung Yi , Soon-Gyu Yim , Seog-Moon Choi , Jin-Gu Kim , Young-Do Kweon
CPC分类号： H05K1/162 , H01L23/3114 , H01L23/50 , H01L23/5389 , H01L23/642 , H01L24/25 , H01L2224/05001 , H01L2224/05548 , H01L2224/12105 , H01L2224/24227 , H01L2224/2518 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/14 , H01L2924/15311 , H01L2924/19015 , H01L2924/19041 , H05K1/185 , H05K3/4602 , H05K2201/09763 , H05K2201/10674 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor chip package and a printed circuit board having an embedded semiconductor chip package are disclosed. The semiconductor chip package may include a semiconductor chip that has at least one chip pad formed on one side, and a capacitor formed on the other side of the semiconductor chip.
摘要翻译： 公开了一种半导体芯片封装和具有嵌入式半导体芯片封装的印刷电路板。 半导体芯片封装可以包括在一侧形成有至少一个芯片焊盘的半导体芯片和形成在半导体芯片的另一侧上的电容器。
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