Quadrature coupled controllable oscillator and communication arrangement
    2.
    发明授权
    Quadrature coupled controllable oscillator and communication arrangement 有权
    正交耦合可控振荡器和通信布置

    公开(公告)号:US06791423B2

    公开(公告)日:2004-09-14

    申请号:US10066348

    申请日:2002-01-31

    IPC分类号: H03K3281

    摘要: A quadrature coupled controlled oscillator comprising a first and a second circuit module, each of the circuit modules (100 and 100′) comprising an astable multivibrator circuit (103). The first circuit module is coupled with the second circuit module and the second circuit module is cross coupled with the first circuit module. Each of the circuit modules (100 and 100′) comprises a first and a second Voltage Controlled Current Source (101) (VCCS). In each of the circuit modules, each VCCS is coupled to a phase shifter (102) for shifting the phase of a current (110) supplied by the VCCS to a resonator (104) included in that circuit module. A communication arrangement (300) for communicating via a bi-directional communication channel (304), comprises an oscillator (303) as described above for generating a periodic signal. A receiving module (301) generates an output signal from the periodic signal and a receiving signal received from the channel (304). The arrangement further comprises an emission module (302) for generating an emission signal for emitting to the channel from the periodic signal and an input signal.

    摘要翻译: 一种正交耦合控制振荡器,包括第一和第二电路模块,每个电路模块(100和100')包括不稳定的多谐振荡器电路(103)。 第一电路模块与第二电路模块耦合,第二电路模块与第一电路模块交叉耦合。 每个电路模块(100和100')包括第一和第二压控电流源(101)(VCCS)。 在每个电路模块中,每个VCCS耦合到移相器(102),用于将由VCCS提供的电流(110)的相位移位到包括在该电路模块中的谐振器(104)。 用于经由双向通信信道(304)通信的通信装置(300)包括如上所述的用于生成周期性信号的振荡器(303)。 接收模块(301)从周期信号和从信道(304)接收的接收信号产生输出信号。 该装置还包括用于从周期信号和输入信号产生用于发射到信道的发射信号的发射模块(302)。

    Method for modulating an output voltage of a RF transmitter circuit, and RF transmitter circuit
    4.
    发明授权
    Method for modulating an output voltage of a RF transmitter circuit, and RF transmitter circuit 有权
    用于调制RF发射机电路的输出电压的方法和RF发射机电路

    公开(公告)号:US06784753B2

    公开(公告)日:2004-08-31

    申请号:US10144528

    申请日:2002-05-13

    IPC分类号: H03B508

    摘要: The invention relates to a method for modulating an output voltage of a transmitter circuit comprising a voltage controlled oscillator, a digital/analog converter and an antenna circuit, the method comprising the method comprising sending an output signal of sufficient power from the voltage controlled oscillator directly to the antenna circuit and directly modulating a frequency of the output signal of the voltage controlled oscillator. The invention furthermore relates to a transmitter circuit comprising a voltage controlled oscillator having a tank circuit, a digital/analog converter and an antenna circuit, wherein the voltage controlled oscillator is adapted to send an output signal of sufficient power directly to the antenna circuit and wherein the digital/analog converter is arranged to modulate an output frequency of the voltage controlled oscillator. A capacitive load circuit may be connected to the tank circuit or a crystal oscillator circuit of the voltage controlled oscillator for modulating the frequency of the voltage controlled oscillator.

    摘要翻译: 本发明涉及一种用于调制包括压控振荡器,数字/模拟转换器和天线电路的发射机电路的输出电压的方法,该方法包括直接从压控振荡器发送足够功率的输出信号 到天线电路并直接调制压控振荡器的输出信号的频率。 本发明还涉及一种包括具有振荡电路,数字/模拟转换器和天线电路的压控振荡器的发射机电路,其中压控振荡器适于将足够功率的输出信号直接发送到天线电路,其中 数字/模拟转换器被布置成调制压控振荡器的输出频率。 容性负载电路可以连接到用于调制压控振荡器的频率的压控振荡器的振荡电路或晶体振荡器电路。

    Tunable integrated RF filter having switched field effect capacitors
    6.
    发明授权
    Tunable integrated RF filter having switched field effect capacitors 有权
    具有开关场效应电容器的可调谐集成RF滤波器

    公开(公告)号:US06791402B2

    公开(公告)日:2004-09-14

    申请号:US10055361

    申请日:2002-01-23

    IPC分类号: H03B100

    CPC分类号: H03H7/0153

    摘要: A filter (3) is described, which filter is provided with field effect (FET) capacitors (M1-32; M′1-32) arranged for controlling their respective capacity values, each such FET capacitor (M1-32; M′1-32) having a source (S) and a drain (D). The source (S) and the drain (D) of each FET capacitor (M1-32; M′1-32) are coupled to one another. The filter acting as an impedance transformer is a passive low power consuming and tunable filter, such as for a radio frequency (RF) receiver. It occupies only a very small area, while integrated on chip.

    摘要翻译: 描述了一种滤波器(3),该滤波器设置有用于控制其各自电容值的场效应(FET)电容器(M1-32; M'1-32),每个这样的FET电容器(M1-32; M'1 -32),其具有源极(S)和漏极(D)。 每个FET电容器(M1-32; M'1-32)的源极(S)和漏极(D)彼此耦合。 用作阻抗变换器的滤波器是无源低功耗和可调谐滤波器,例如用于射频(RF)接收器。 它只占很小的一部分,同时集成在芯片上。

    Frequency synthesiser
    7.
    发明授权
    Frequency synthesiser 有权
    频率合成器

    公开(公告)号:US09240772B2

    公开(公告)日:2016-01-19

    申请号:US13262626

    申请日:2010-03-30

    摘要: A low power frequency synthesizer circuit for a radio transceiver, the synthesizer circuit comprising: a digital controlled oscillator configured to generate an output signal (Fo) having a frequency controlled by an input digital control word (DCW); a feedback loop connected between an output and an input of the digital controlled oscillator, the feedback loop configured to provide the digital control word to the input of the digital controlled oscillator from an error derived from an input frequency control word (FCW) and the output signal; and a duty cycle module connected to the digital controlled oscillator and the feedback loop, the duty cycle module configured to generate a plurality of control signals to periodically enable and disable the digital controlled oscillator for a set fraction of clock cycles of an input reference clock signal (RefClock).

    摘要翻译: 一种用于无线电收发器的低功率频率合成器电路,所述合成器电路包括:数字控制振荡器,被配置为产生具有由输入数字控制字(DCW)控制的频率的输出信号(Fo); 连接在数字控制振荡器的输出和输入端之间的反馈回路,反馈回路被配置为从数字控制振荡器的输入端向从输入频率控制字(FCW)和输出 信号; 以及连接到数字控制振荡器和反馈回路的占空比模块,所述占空比模块被配置为产生多个控制信号,以周期地启用和禁用数字控制振荡器用于输入参考时钟信号的时钟周期的一小部分 (RefClock)。

    Frequency divider
    8.
    发明授权
    Frequency divider 有权
    分频器

    公开(公告)号:US07579883B2

    公开(公告)日:2009-08-25

    申请号:US11573349

    申请日:2005-07-27

    IPC分类号: H03B19/00

    CPC分类号: H03K23/505 H03K23/662

    摘要: A frequency divider providing an odd integer division factor comprising a binary counter (10) providing an even integer division factor, which is the first even number smaller than the odd division factor, the binary counter having a clock input for receiving a periodical clock signal (Ck) having a frequency. The circuit further comprises an end of count circuit (20) coupled to the binary counter and generating an End Of Count signal (EOC) for a clock (Ck) period after every even integer number periods of the clock signal (Ck), the end of count signal (EOC) being inputted to an input (IN) of the counter (10). The circuit further includes an output generator (30) coupled to the binary counter and to the clock signal (Ck), the output generator (30) generating an output signal (OUT) having a frequency which is substantially equal with the frequency of the frequency signal (Ck) divided by the odd division factor.

    摘要翻译: 一种提供奇整数除法系数的分频器,包括二进制计数器(10),该二进制计数器提供偶数整数除数因子,其是比奇分系数小的第一偶数,二进制计数器具有用于接收周期性时钟信号的时钟输入( Ck)具有频率。 电路还包括耦合到二进制计数器的计数电路(20)的末端,并且在时钟信号(Ck)的每个偶数整数周期之后产生用于时钟(Ck)周期的计数结束信号(EOC),结束 的计数信号(EOC)输入到计数器(10)的输入(IN)。 电路还包括耦合到二进制计数器和时钟信号(Ck)的输出发生器(30),输出发生器(30)产生具有与频率频率基本相等的频率的输出信号(OUT) 信号(Ck)除以奇分系数。

    Device for ultra wide band frequency generating
    9.
    发明授权
    Device for ultra wide band frequency generating 失效
    超宽带频率发生装置

    公开(公告)号:US07567131B2

    公开(公告)日:2009-07-28

    申请号:US11574916

    申请日:2005-09-05

    IPC分类号: H03L7/00

    CPC分类号: H03D3/009

    摘要: Devices (1) for exchanging ultra wide band signals comprise frequency translating stages (20,30) for frequency translating signals and oscillating stages (40) for supplying main inphase/quadrature oscillation signals to the frequency translating stages (20,30). By providing the oscillating stages (40) with polyphase filters (43,44) for reducing harmonics in oscillation signals, the main oscillation signals will be sufficiently clean. The oscillating stages (40) comprise mixers (46) for converting first inphase/quadrature oscillation signals and second inphase/quadrature oscillation signals into the main oscillation signals. The polyphase filters (43,44) may be located before and after the mixers (46). Frequency selectors (45) replace prior art multiplexers located after the mixers (46). Such frequency selectors (45) comprise multiplexers (126,127) for supplying the second inphase/quadrature oscillation signals, with a combination of these second oscillation signals corresponding with a positive frequency, a negative frequency or a zero frequency, and comprise coders (125) for controlling the multiplexers (126,127).

    摘要翻译: 用于交换超宽带信号的装置(1)包括用于频率转换信号的频率转换级(20,30)和用于将主相位/正交振荡信号提供给频率转换级(20,30)的振荡级(40)。 通过为振荡级(40)提供多相滤波器(43,44)以减少振荡信号中的谐波,主振荡信号将足够清洁。 振荡级(40)包括用于将第一同相/正交振荡信号和第二同相/正交振荡信号转换成主振荡信号的混频器(46)。 多相过滤器(43,44)可以位于混合器(46)之前和之后。 频率选择器(45)代替位于混频器(46)之后的现有技术的多路复用器。 这种频率选择器(45)包括用于提供第二同相/正交振荡信号的多路复用器(126,127)以及与正频率,负频率或零频率对应的这些第二振荡信号的组合,并且包括编码器(125),用于 控制多路复用器(126,127)。

    FREQUENCY-HOPPING ARRANGEMENT
    10.
    发明申请
    FREQUENCY-HOPPING ARRANGEMENT 审中-公开
    频率偏好安排

    公开(公告)号:US20090304044A1

    公开(公告)日:2009-12-10

    申请号:US11814002

    申请日:2006-01-10

    IPC分类号: H04B1/713

    摘要: A frequency-hopping arrangement comprises a basic-frequency branch (DIV1), an offset-frequency branch (DIV2, DIV3, SCC), and a controllable frequency converter (SBM, FSC). The basic-frequency branch (DIV1) receives an oscillator signal (OS) having an oscillator-signal frequency (7920 MHz). The basic-frequency branch has a frequency-division factor (/2) so as to provide a basic-frequency signal (BF) having a basic frequency (+3960 MHz) that is the oscillator-signal frequency divided by the frequency-division factor. The offset-frequency branch (DIV2, DIV3, SCC) receives the same oscillator signal (OS). The offset-frequency branch has a different frequency-division factor (/3, /5) so as to provide an offset-frequency signal (OF) having an offset frequency (+528 MHz) that is the oscillator-signal frequency divided by the different frequency-division factor. The controllable frequency converter (SBM, FSC) provides a frequency-hopping signal (FHS) having a frequency (cl*+3960+c2*+528 MHz) that is a linear combination of the basic frequency and the offset frequency with at least one coefficient (c2) that varies as a function of a hopping-control signal (HCS).

    摘要翻译: 跳频装置包括基频分支(DIV1),偏移频分支(DIV2,DIV3,SCC)和可控变频器(SBM,FSC)。 基频分支(DIV1)接收具有振荡器信号频率(7920MHz)的振荡器信号(OS)。 基本频率分支具有分频因子(/ 2),以便提供基本频率(+ 3960MHz)的基本频率信号(BF),其是振荡器信号频率除以分频因子 。 偏移频率分支(DIV2,DIV3,SCC)接收相同的振荡器信号(OS)。 偏移频率分支具有不同的分频因子(/ 3,/ 5),以便提供具有偏移频率(+ 528MHz)的偏移频率信号(OF),该偏移频率信号是振荡器信号频率除以 不同的分频因子。 可控频率转换器(SBM,FSC)提供具有频率(cl * + 3960 + c2 * + 528MHz)的频率跳频信号(FHS),其是基本频率和偏移频率的线性组合,并具有至少一个 系数(c2)随跳频控制信号(HCS)的变化而变化。