摘要:
A surface emitting light emitting device with a semiconducting substrate, a semiconducting mirror stack positioned on the substrate surface, a spacer layer positioned on the mirror stack, an active region positioned on the spacer layer, a second spacer layer positioned on the active region, a second semiconducting mirror stack positioned on the second spacer layer, and a top contact layer positioned in contact with the second semiconducting mirror stack. The active region includes multiple quantum wells each having a different transition wavelength and positioned on the spacer layer with the quantum well possessing the longest transition wavelength located closest to the spacer layer and additional quantum wells of the multiple quantum wells positioned in order of decreasing transition wavelength so that the sum of the emission from all of the quantum wells results in a broad and uniform output emission spectrum.
摘要:
A planar semiconductor laser having low thermal and series resistance is fabricated. The semiconductor laser has an optical waveguide and a lateral current injection path provided by a conductive region. The conductive region disorders the active region and the first 1/4 wave stack of the laser, which reduces the reflectivity, therefore allowing control of the optical waveguide independent of the current flow. By forming the conductive region, the laser of the present invention can have stable optical characteristics and a bigger emission spot due to the weak built-in waveguide, thus resulting in the formation of a device having high output and a low thermal and series resistance.
摘要:
A vertical cavity surface emitting laser (VCSEL), comprised of a first 1/4 wave stack, an active layer and a second 1/4 wave stack, is integrated with a heterojunction bipolar transistor (HBT). The HBT is partially or fully positioned within either the first or the second 1/4 wave stack of the VCSEL. This method improves the planarity of the device, thus allowing for high performance devices to be fabricated. A top or bottom emitting device may be fabricated with the second 1/4 wave stack comprised of dielectric layers or semiconductor epitaxial layers.
摘要:
A method of growing gallium nitride on a spinel substrate by providing a supporting substrate having a surface, and disposing a plurality of buffer layers on the surface of the supporting substrate. The plurality of buffer layers including a first buffer layer of aluminum oxynitride having a low percentage of mismatch to the spinel substrate. The second buffer layer is disposed on the first buffer layer and includes a plurality of layers of a graded aluminum oxynitride having a low dislocation density. A third buffer layer of aluminum nitride is disposed on the second buffer layer. A fourth buffer layer of gallium nitride is disposed on the third buffer layer. Subsequently, a photonic device structure, such as a laser, LED or detector, an electronic device structure, such as a field effect transistor or modulation doped field effect transistor, or an optical waveguide is fabricated on the fourth buffer layer.
摘要:
A magnetic field sensor includes in-plane sense elements located in a plane of the magnetic field sensor and configured to detect a magnetic field oriented perpendicular to the plane. A current carrying structure is positioned proximate the magnetic field sensor and includes at least one coil surrounding the in-plane sense elements. An electric current is applied to the coil to create a self-test magnetic field to be sensed by the sense elements. The coil may be vertically displaced from the plane in which the sense elements are located and laterally displaced from an area occupied by the sense elements to produce both Z-axis magnetic field components and lateral magnetic field components of the self-test magnetic field. The sense elements are arranged within the coil and interconnected to cancel the lateral magnetic field components, while retaining the Z-axis magnetic field components to be used for self-test of the magnetic field sensor.
摘要:
A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure. The structure includes a sensor wafer (92) and a cap wafer (94). Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers. One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers to expose the bond pads, forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).
摘要:
Apparatus, systems, and methods are provided for sensing devices. An exemplary sensing device includes a sensing arrangement on a substrate to sense a first property, a heating arrangement, and a control system coupled to the first sensing arrangement and the heating arrangement to activate the heating arrangement to heat the first sensing arrangement and deactivate the heating arrangement while obtaining one or more measurement values for the first property from the first sensing arrangement.
摘要:
An apparatus and method is provided for recognizing ear biometrics of an approved user of a wireless device. The apparatus comprises a wireless communication device (50) including a first biometric device (52) for assessing the identity of the user, the biometric device (52) comprising a touch input display (52) including a plurality of pixels for providing a visual output, and a plurality of sensors (84), one each being incorporated within one of the plurality of pixels (82), for recording at least a partial image of a user's ear (10) when the touch input display (52) is placed against an ear (10) of the user in a first mode and for receiving an input in response to being touched by the user in a second mode. A controller (120) is coupled to the first biometric device (52) in the first mode, wherein the controller (120) enables the function when the identity of the user is verified by the first biometric device (52). Additional biometric devices may be included wherein a positive response from one of the biometric devices enables the function of the wireless device.
摘要:
High quality epitaxial layers of monocrystalline materials (26) can be grown overlying monocrystalline substrates (22) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer (24) comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy and epitaxial growth of single crystal silicon onto single crystal oxide materials. A microresonator device is formed overlying the monocrystalline substrate. Portions or an entirety of the microresonator device can also overly the accommodating buffer layer, or the monocrystalline material layer.
摘要:
A method of fabricating an active matrix LED array includes forming layers of material on a substrate, which layers cooperate to emit light when activated. Row and column dividers are formed in the layers to divide the layers into an array of LEDs arranged in rows and columns. One FET is formed on the row dividers in association with each LED and a source of each FET is connected to an anode of the associated LED. Row and column buses are formed on the row and column dividers, respectively, and the drain of each FET is connected to an adjacent row bus with the gate of each FET being connected to an adjacent column bus. A cathode for each LED is connected as a common terminal for all of the LEDs in the array.