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    Direct Memory Access Transfer Completion Notification
    1.
    发明申请
    Direct Memory Access Transfer Completion Notification 失效
    直接内存访问传输完成通知

    公开(公告)号：US20080307121A1

    公开(公告)日：2008-12-11

    申请号：US11758167

    申请日：2007-06-05

    申请人： Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker ,  Burkhard D. Steinmacher-Burow ,  Pavlos Vranas

    发明人： Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker ,  Burkhard D. Steinmacher-Burow ,  Pavlos Vranas

    IPC分类号： G06F13/28

    CPC分类号： G06F13/28

    摘要： Methods, compute nodes, and computer program products are provided for direct memory access (‘DMA’) transfer completion notification. Embodiments include determining, by an origin DMA engine on an origin compute node, whether a data descriptor for an application message to be sent to a target compute node is currently in an injection first-in-first-out (‘FIFO’) buffer in dependence upon a sequence number previously associated with the data descriptor, the total number of descriptors currently in the injection FIFO buffer, and the current sequence number for the newest data descriptor stored in the injection FIFO buffer; and notifying a processor core on the origin DMA engine that the message has been sent if the data descriptor for the message is not currently in the injection FIFO buffer.

    摘要翻译： 提供方法，计算节点和计算机程序产品用于直接内存访问（“DMA”）传输完成通知。 实施例包括通过原始计算节点上的原始DMA引擎确定要发送到目标计算节点的应用消息的数据描述符当前是否处于先进先出先入先出（FIFO）缓冲器 依赖于先前与数据描述符相关联的序列号，当前在注入FIFO缓冲器中的描述符的总数以及存储在注入FIFO缓冲器中的最新数据描述符的当前序列号; 并且如果消息的数据描述符当前不在注入FIFO缓冲器中，则通知源DMA引擎上的处理器核心消息已被发送。

    Direct memory access transfer completion notification
    2.
    发明授权
    Direct memory access transfer completion notification 失效
    直接内存访问传输完成通知

    公开(公告)号：US07765337B2

    公开(公告)日：2010-07-27

    申请号：US11758167

    申请日：2007-06-05

    申请人： Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker ,  Burkhard D. Steinmacher-Burow ,  Pavlos Vranas

    发明人： Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker ,  Burkhard D. Steinmacher-Burow ,  Pavlos Vranas

    IPC分类号： G06F13/28 ,  G06F3/00 ,  G06F13/00

    CPC分类号： G06F13/28

    摘要： Methods, compute nodes, and computer program products are provided for direct memory access (‘DMA’) transfer completion notification. Embodiments include determining, by an origin DMA engine on an origin compute node, whether a data descriptor for an application message to be sent to a target compute node is currently in an injection first-in-first-out (‘FIFO’) buffer in dependence upon a sequence number previously associated with the data descriptor, the total number of descriptors currently in the injection FIFO buffer, and the current sequence number for the newest data descriptor stored in the injection FIFO buffer; and notifying a processor core on the origin DMA engine that the message has been sent if the data descriptor for the message is not currently in the injection FIFO buffer.

    摘要翻译： 提供方法，计算节点和计算机程序产品用于直接内存访问（“DMA”）传输完成通知。 实施例包括通过原始计算节点上的原始DMA引擎确定要发送到目标计算节点的应用消息的数据描述符当前是否处于先进先出先入先出（FIFO）缓冲器 依赖于先前与数据描述符相关联的序列号，当前在注入FIFO缓冲器中的描述符的总数以及存储在注入FIFO缓冲器中的最新数据描述符的当前序列号; 并且如果消息的数据描述符当前不在注入FIFO缓冲器中，则通知源DMA引擎上的处理器核心消息已被发送。

    Message passing with a limited number of DMA byte counters
    4.
    发明授权
    Message passing with a limited number of DMA byte counters 失效
    消息传递有限数量的DMA字节计数器

    公开(公告)号：US08032892B2

    公开(公告)日：2011-10-04

    申请号：US11768813

    申请日：2007-06-26

    申请人： Michael Blocksome ,  Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    发明人： Michael Blocksome ,  Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    IPC分类号： G06F9/44 ,  G06F9/46 ,  G06F13/00 ,  G06F15/167

    CPC分类号： G06F15/17356 ,  G06F9/546

    摘要： A method for passing messages in a parallel computer system constructed as a plurality of compute nodes interconnected as a network where each compute node includes a DMA engine but includes only a limited number of byte counters for tracking a number of bytes that are sent or received by the DMA engine, where the byte counters may be used in shared counter or exclusive counter modes of operation. The method includes using rendezvous protocol, a source compute node deterministically sending a request to send (RTS) message with a single RTS descriptor using an exclusive injection counter to track both the RTS message and message data to be sent in association with the RTS message, to a destination compute node such that the RTS descriptor indicates to the destination compute node that the message data will be adaptively routed to the destination node. Using one DMA FIFO at the source compute node, the RTS descriptors are maintained for rendezvous messages destined for the destination compute node to ensure proper message data ordering thereat. Using a reception counter at a DMA engine, the destination compute node tracks reception of the RTS and associated message data and sends a clear to send (CTS) message to the source node in a rendezvous protocol form of a remote get to accept the RTS message and message data and processing the remote get (CTS) by the source compute node DMA engine to provide the message data to be sent.

    摘要翻译： 一种在并行计算机系统中传送消息的方法，该并行计算机系统被构造为作为网络互连的多个计算节点，其中每个计算节点包括DMA引擎，但是仅包括有限数量的字节计数器，用于跟踪由 DMA引擎，其中可以在共享计数器或专用计数器操作模式中使用字节计数器。 该方法包括使用会合协议，源计算节点使用专用注入计数器确定性地发送具有单个RTS描述符的请求（RTS）消息以跟踪要与RTS消息相关联地发送的RTS消息和消息数据， 到目的地计算节点，使得RTS描述符向目标计算节点指示消息数据将自适应地路由到目的地节点。 在源计算节点使用一个DMA FIFO，将为发往目的地计算节点的会合消息保留RTS描述符，以确保正确的消息数据顺序。 在DMA引擎上使用接收计数器，目的地计算节点跟踪RTS和相关联的消息数据的接收，并以远程获取的会合协议形式向源节点发送明确发送（CTS）消息以接受RTS消息 和消息数据，并由源计算节点DMA引擎处理远程获取（CTS）以提供要发送的消息数据。

    MESSAGE PASSING WITH A LIMITED NUMBER OF DMA BYTE COUNTERS
    6.
    发明申请
    MESSAGE PASSING WITH A LIMITED NUMBER OF DMA BYTE COUNTERS 失效
    消息传递与有限数量的DMA字节计数器

    公开(公告)号：US20090007141A1

    公开(公告)日：2009-01-01

    申请号：US11768813

    申请日：2007-06-26

    申请人： Michael Blocksome ,  Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    发明人： Michael Blocksome ,  Dong Chen ,  Mark E. Giampapa ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    IPC分类号： G06F9/44

    CPC分类号： G06F15/17356 ,  G06F9/546

    摘要： A method for passing messages in a parallel computer system constructed as a plurality of compute nodes interconnected as a network where each compute node includes a DMA engine but includes only a limited number of byte counters for tracking a number of bytes that are sent or received by the DMA engine, where the byte counters may be used in shared counter or exclusive counter modes of operation. The method includes using rendezvous protocol, a source compute node deterministically sending a request to send (RTS) message with a single RTS descriptor using an exclusive injection counter to track both the RTS message and message data to be sent in association with the RTS message, to a destination compute node such that the RTS descriptor indicates to the destination compute node that the message data will be adaptively routed to the destination node. Using one DMA FIFO at the source compute node, the RTS descriptors are maintained for rendezvous messages destined for the destination compute node to ensure proper message data ordering thereat. Using a reception counter at a DMA engine, the destination compute node tracks reception of the RTS and associated message data and sends a clear to send (CTS) message to the source node in a rendezvous protocol form of a remote get to accept the RTS message and message data and processing the remote get (CTS) by the source compute node DMA engine to provide the message data to be sent.

    摘要翻译： 一种在并行计算机系统中传送消息的方法，该并行计算机系统被构造为作为网络互连的多个计算节点，其中每个计算节点包括DMA引擎，但是仅包括有限数量的字节计数器，用于跟踪由 DMA引擎，其中可以在共享计数器或专用计数器操作模式中使用字节计数器。 该方法包括使用会合协议，源计算节点使用专用注入计数器确定性地发送具有单个RTS描述符的请求（RTS）消息以跟踪要与RTS消息相关联地发送的RTS消息和消息数据， 到目的地计算节点，使得RTS描述符向目标计算节点指示消息数据将自适应地路由到目的地节点。 在源计算节点使用一个DMA FIFO，将为发往目的地计算节点的会合消息保留RTS描述符，以确保正确的消息数据顺序。 在DMA引擎上使用接收计数器，目的地计算节点跟踪RTS和相关联的消息数据的接收，并以远程获取的会合协议形式向源节点发送明确发送（CTS）消息以接受RTS消息 和消息数据，并由源计算节点DMA引擎处理远程获取（CTS）以提供要发送的消息数据。

    Executing application function calls in response to an interrupt
    7.
    发明授权
    Executing application function calls in response to an interrupt 有权
    执行应用程序函数调用以响应中断

    公开(公告)号：US07716407B2

    公开(公告)日：2010-05-11

    申请号：US11968720

    申请日：2008-01-03

    申请人： Gheorghe Almasi ,  Charles J. Archer ,  Mark E. Giampapa ,  Thomas M. Gooding ,  Philip Heidelberger ,  Jeffrey J. Parker

    发明人： Gheorghe Almasi ,  Charles J. Archer ,  Mark E. Giampapa ,  Thomas M. Gooding ,  Philip Heidelberger ,  Jeffrey J. Parker

    IPC分类号： G06F13/24

    CPC分类号： G06F9/4812 ,  G06F9/542 ,  G06F2209/543

    摘要： Executing application function calls in response to an interrupt including creating a thread; receiving an interrupt having an interrupt type; determining whether a value of a semaphore represents that interrupts are disabled; if the value of the semaphore represents that interrupts are not disabled: calling, by the thread, one or more preconfigured functions in dependence upon the interrupt type of the interrupt; yielding the thread; and if the value of the semaphore represents that interrupts are disabled: setting the value of the semaphore to represent to a kernel that interrupts are hard-disabled; and hard-disabling interrupts at the kernel.

    摘要翻译： 响应于包括创建线程的中断执行应用程序函数调用; 接收具有中断类型的中断; 确定信号量的值是否表示中断被禁用; 如果信号量的值表示中断未被禁用：根据中断的中断类型，线程调用一个或多个预配置函数; 产生线程; 并且如果信号量的值表示中断被禁用：将信号量的值表示为中断的内核是硬禁用的; 并在内核上进行硬禁止中断。

    Executing Application Function Calls in Response to an Interrupt
    8.
    发明申请
    Executing Application Function Calls in Response to an Interrupt 有权
    执行响应中断的应用程序函数调用

    公开(公告)号：US20090177828A1

    公开(公告)日：2009-07-09

    申请号：US11968720

    申请日：2008-01-03

    申请人： Gheorghe Almasi ,  Charles J. Archer ,  Mark E. Giampapa ,  Thomas M. Gooding ,  Philip Heidelberger ,  Jeffrey J. Parker

    发明人： Gheorghe Almasi ,  Charles J. Archer ,  Mark E. Giampapa ,  Thomas M. Gooding ,  Philip Heidelberger ,  Jeffrey J. Parker

    IPC分类号： G06F13/24

    CPC分类号： G06F9/4812 ,  G06F9/542 ,  G06F2209/543

    摘要： Executing application function calls in response to an interrupt including creating a thread; receiving an interrupt having an interrupt type; determining whether a value of a semaphore represents that interrupts are disabled; if the value of the semaphore represents that interrupts are not disabled: calling, by the thread, one or more preconfigured functions in dependence upon the interrupt type of the interrupt; yielding the thread; and if the value of the semaphore represents that interrupts are disabled: setting the value of the semaphore to represent to a kernel that interrupts are hard-disabled; and hard-disabling interrupts at the kernel.

    摘要翻译： 响应于包括创建线程的中断执行应用程序函数调用; 接收具有中断类型的中断; 确定信号量的值是否表示中断被禁用; 如果信号量的值表示中断未被禁用：根据中断的中断类型，线程调用一个或多个预配置函数; 产生线程; 并且如果信号量的值表示中断被禁用：将信号量的值表示为中断的内核是硬禁用的; 并在内核上进行硬禁止中断。

    Replenishing Data Descriptors in a DMA Injection FIFO Buffer
    9.
    发明申请
    Replenishing Data Descriptors in a DMA Injection FIFO Buffer 失效
    在DMA注入FIFO缓冲区中补充数据描述符

    公开(公告)号：US20100268852A1

    公开(公告)日：2010-10-21

    申请号：US11755501

    申请日：2007-05-30

    申请人： Charles J Archer ,  Michael A. Blocksome ,  Bob R. Cernohous ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    发明人： Charles J Archer ,  Michael A. Blocksome ,  Bob R. Cernohous ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    IPC分类号： G06F13/28

    CPC分类号： G06F13/28

    摘要： Methods, apparatus, and products are disclosed for replenishing data descriptors in a Direct Memory Access (‘DMA’) injection first-in-first-out (‘FIFO’) buffer that include: determining, by a messaging module on an origin compute node, whether a number of data descriptors in a DMA injection FIFO buffer exceeds a predetermined threshold, each data descriptor specifying an application message for transmission to a target compute node; queuing, by the messaging module, a plurality of new data descriptors in a pending descriptor queue if the number of the data descriptors in the DMA injection FIFO buffer exceeds the predetermined threshold; establishing, by the messaging module, interrupt criteria that specify when to replenish the injection FIFO buffer with the plurality of new data descriptors in the pending descriptor queue; and injecting, by the messaging module, the plurality of new data descriptors into the injection FIFO buffer in dependence upon the interrupt criteria.

    摘要翻译： 公开了用于在直接存储器访问（“DMA”）注入先进先出（'FIFO'）缓冲器中补充数据描述符的方法，装置和产品，其包括：由原始计算节点 无论DMA注入FIFO缓冲器中的多个数据描述符是否超过预定阈值，每个数据描述符指定用于传输到目标计算节点的应用消息; 如果DMA注入FIFO缓冲器中的数据描述符的数量超过预定阈值，则由消息接发模块排队等待描述符队列中的多个新数据描述符; 由所述消息传递模块建立中断标准，所述中断标准指定何时用所述待处理描述符队列中的所述多个新数据描述符补充所述注入FIFO缓冲器; 以及根据所述中断标准，由所述消息收发模块将所述多个新数据描述符注入到所述注入FIFO缓冲器中。

    Replenishing data descriptors in a DMA injection FIFO buffer
    10.
    发明授权
    Replenishing data descriptors in a DMA injection FIFO buffer 失效
    在DMA注入FIFO缓冲区中补充数据描述符

    公开(公告)号：US08037213B2

    公开(公告)日：2011-10-11

    申请号：US11755501

    申请日：2007-05-30

    申请人： Charles J. Archer ,  Michael A. Blocksome ,  Bob R. Cernohous ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    发明人： Charles J. Archer ,  Michael A. Blocksome ,  Bob R. Cernohous ,  Philip Heidelberger ,  Sameer Kumar ,  Jeffrey J. Parker

    IPC分类号： G06F3/00 ,  H04L12/28

    CPC分类号： G06F13/28

    摘要： Methods, apparatus, and products are disclosed for replenishing data descriptors in a Direct Memory Access (‘DMA’) injection first-in-first-out (‘FIFO’) buffer that include: determining, by a messaging module on an origin compute node, whether a number of data descriptors in a DMA injection FIFO buffer exceeds a predetermined threshold, each data descriptor specifying an application message for transmission to a target compute node; queuing, by the messaging module, a plurality of new data descriptors in a pending descriptor queue if the number of the data descriptors in the DMA injection FIFO buffer exceeds the predetermined threshold; establishing, by the messaging module, interrupt criteria that specify when to replenish the injection FIFO buffer with the plurality of new data descriptors in the pending descriptor queue; and injecting, by the messaging module, the plurality of new data descriptors into the injection FIFO buffer in dependence upon the interrupt criteria.

    摘要翻译： 公开了用于在直接存储器访问（“DMA”）注入先进先出（'FIFO'）缓冲器中补充数据描述符的方法，装置和产品，其包括：由原始计算节点 无论DMA注入FIFO缓冲器中的多个数据描述符是否超过预定阈值，每个数据描述符指定用于传输到目标计算节点的应用消息; 如果DMA注入FIFO缓冲器中的数据描述符的数量超过预定阈值，则由消息接发模块排队等待描述符队列中的多个新数据描述符; 由所述消息传递模块建立中断标准，所述中断标准指定何时用所述待处理描述符队列中的所述多个新数据描述符补充所述注入FIFO缓冲器; 以及根据所述中断标准，由所述消息收发模块将所述多个新数据描述符注入到所述注入FIFO缓冲器中。