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1.发明授权Self-aligned copper silicide formation for improved adhesion/electromigration 失效自对准铜硅化物形成，用于改善粘附/电迁移公开(公告)号：US06251775B1
公开(公告)日：2001-06-26
申请号：US09298796
申请日：1999-04-23
IPC分类号： H01L2144
CPC分类号： H01L21/76849 , H01L21/76867 , H01L21/76883 , H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/05556 , H01L2224/05572 , H01L2224/13099 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/19042
摘要： A method for forming a semiconductor structure includes supplying a structure having an exposed last metalization layer, cleaning the last metalization layer, forming a silicide in a top portion of the last metalization layer and forming a terminal over the silicide.
摘要翻译： 一种用于形成半导体结构的方法包括提供具有暴露的最后金属化层的结构，清洗最后的金属化层，在最后一个金属化层的顶部形成硅化物并在硅化物上形成端子。
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2.发明授权Self-aligned copper silicide formation for improved adhesion/electromigration 失效自对准铜硅化物形成，用于改善粘附/电迁移公开(公告)号：US06818992B1
公开(公告)日：2004-11-16
申请号：US09666325
申请日：2000-09-21
IPC分类号： H01L2348
CPC分类号： H01L21/76849 , H01L21/76867 , H01L21/76883 , H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/05556 , H01L2224/05572 , H01L2224/13099 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/19042
摘要： A method for forming a semiconductor structure includes supplying a structure having an exposed last metalization layer, cleaning the last metalization layer, forming a silicide in a top portion of the last metalization layer and forming a terminal over the silicide.
摘要翻译： 一种用于形成半导体结构的方法包括提供具有暴露的最后金属化层的结构，清洗最后的金属化层，在最后一个金属化层的顶部形成硅化物并在硅化物上形成端子。
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3.发明授权公开(公告)号：US06899785B2
公开(公告)日：2005-05-31
申请号：US09682978
申请日：2001-11-05
IPC分类号： C23F1/00 , H01J37/32 , H01L21/311
CPC分类号： H01J37/32477 , Y10S438/905
摘要： Undesirable reactions (such as formation of volatile compounds or complexes) are recognized to occur during production processes (such as etching with fluorine) at interior surfaces of a reactor chamber (such as a silicon-based reactor chamber). These undesirable reactions may be minimized and controlled by priming the chamber surface by incorporating seasoning atoms and/or molecules.
摘要翻译： 在反应器室（例如硅基反应器室）的内表面的生产过程（例如用氟蚀刻）期间，认识到不希望的反应（例如形成挥发性化合物或络合物）。 可以通过引入调味原子和/或分子来引发室表面来最小化并控制这些不期望的反应。
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公开(公告)号：US06780720B2
公开(公告)日：2004-08-24
申请号：US10187572
申请日：2002-07-01
申请人： Jay S. Burnham , Anthony I. Chou , Toshiharu Furukawa , Margaret L. Gibson , James S. Nakos , Steven M. Shank
发明人： Jay S. Burnham , Anthony I. Chou , Toshiharu Furukawa , Margaret L. Gibson , James S. Nakos , Steven M. Shank
IPC分类号： H01L21336
CPC分类号： H01L21/28202 , H01L21/28185 , H01L21/28194 , H01L21/3144 , H01L21/324 , H01L29/4908 , H01L29/518 , H01L29/66757
摘要： A method of fabricating a gate dielectric layer. The method comprises: providing a substrate; forming a silicon dioxide layer on a top surface of the substrate; exposing the silicon dioxide layer to a plasma nitridation to convert the silicon dioxide layer into a silicon oxynitride layer; and performing a spiked rapid thermal anneal of the silicon oxynitride layer.
摘要翻译： 一种制造栅极电介质层的方法。 该方法包括：提供衬底; 在所述基板的顶表面上形成二氧化硅层; 将二氧化硅层暴露于等离子体氮化，以将二氧化硅层转化为氮氧化硅层; 并进行氮氧化硅层的加热快速热退火。
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