公开(公告)号：US06773952B2

公开(公告)日：2004-08-10

申请号：US10243397

申请日：2002-09-12

申请人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

发明人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

IPC分类号： H01L2100

CPC分类号： H01L23/5222 ,  H01L23/3677 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

摘要： Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate. The thermal sink includes one or more thermally conductive via structures embedded within the substrate and aligned to thermally contact to the cooling posts disposed above the substrate.

摘要翻译： 半导体芯片结构设置有用于从一个或多个导电电路构件去除热量的嵌入式热导体，其中电路构件形成在衬底上方的一个或多个电介质层上，每层具有低介电常数和低热导率 。 一个或多个冷却柱，例如多个导热塞，被选择性地设置在半导体芯片结构内邻近一个或多个导电构件并与其热耦合，使得由构件产生的热量被传送到冷却柱中并通过冷却柱 转移到衬底和/或到半导体芯片结构的上表面。 衬底的背面具有热耦合到其上并与衬底电隔离的散热器。 散热器包括一个或多个热传导通孔结构，其嵌入衬底内并对准以与设置在衬底上方的冷却柱热接触。

公开(公告)号：US06818992B1

公开(公告)日：2004-11-16

申请号：US09666325

申请日：2000-09-21

申请人： Douglas S. Armbrust ,  Margaret L. Gibson ,  Laura Serianni ,  Eric J. White

发明人： Douglas S. Armbrust ,  Margaret L. Gibson ,  Laura Serianni ,  Eric J. White

IPC分类号： H01L2348

CPC分类号： H01L21/76849 ,  H01L21/76867 ,  H01L21/76883 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/19042

摘要： A method for forming a semiconductor structure includes supplying a structure having an exposed last metalization layer, cleaning the last metalization layer, forming a silicide in a top portion of the last metalization layer and forming a terminal over the silicide.

摘要翻译： 一种用于形成半导体结构的方法包括提供具有暴露的最后金属化层的结构，清洗最后的金属化层，在最后一个金属化层的顶部形成硅化物并在硅化物上形成端子。

公开(公告)号：US06512292B1

公开(公告)日：2003-01-28

申请号：US09660270

申请日：2000-09-12

申请人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

发明人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

IPC分类号： H01L2312

CPC分类号： H01L23/5222 ,  H01L23/3677 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

摘要： Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate. The thermal sink includes one or more thermally conductive via structures embedded within the substrate and aligned to thermally contact to the cooling posts disposed above the substrate.

摘要翻译： 半导体芯片结构设置有用于从一个或多个导电电路构件去除热量的嵌入式热导体，其中电路构件形成在衬底上方的一个或多个电介质层上，每层具有低介电常数和低热导率 。 一个或多个冷却柱，例如多个导热塞，被选择性地设置在半导体芯片结构内邻近一个或多个导电构件并与其热耦合，使得由构件产生的热量被传送到冷却柱中并通过冷却柱 转移到衬底和/或到半导体芯片结构的上表面。 衬底的背面具有热耦合到其上并与衬底电隔离的散热器。 散热器包括一个或多个热传导通孔结构，其嵌入衬底内并对准以与设置在衬底上方的冷却柱热接触。

公开(公告)号：US06610607B1

公开(公告)日：2003-08-26

申请号：US09578362

申请日：2000-05-25

申请人： Douglas S. Armbrust ,  Dale W. Martin ,  Jed H. Rankin ,  Sylvia Tousley

发明人： Douglas S. Armbrust ,  Dale W. Martin ,  Jed H. Rankin ,  Sylvia Tousley

IPC分类号： H01L21461

CPC分类号： H01L21/32139 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/28123

摘要： A method to define and tailor process limited lithographic features is provided. The method may be used to form sub lithographic spaces between features on a semiconductor wafer. A mask is formed and patterned on the wafer. Spacers are formed on sidewalls of the mask. The pattern of the mask and spacers is then transferred to an underlying layer.

摘要翻译： 提供了一种定义和定制加工限制光刻特征的方法。 该方法可用于在半导体晶片上的特征之间形成次光刻空间。 在晶片上形成并图案化掩模。 垫片形成在面罩的侧壁上。 然后将掩模和间隔物的图案转移到下层。

公开(公告)号：US07094614B2

公开(公告)日：2006-08-22

申请号：US09681126

申请日：2001-01-16

申请人： Douglas S. Armbrust ,  John M. Baker ,  Arne W. Ballantine ,  Roger W. Cheek ,  Doreen D. DiMilia ,  Mark L. Reath ,  Michael B. Rice

发明人： Douglas S. Armbrust ,  John M. Baker ,  Arne W. Ballantine ,  Roger W. Cheek ,  Doreen D. DiMilia ,  Mark L. Reath ,  Michael B. Rice

IPC分类号： H01L21/66 ,  B05C11/00

CPC分类号： H01L21/28556 ,  C23C16/52

摘要： A method and apparatus are provided for controlling a CVD process used to deposit films on semiconductor substrates wherein the by-products of the reaction are measured and monitored during the reaction preferably using mass spectrometry and the results used to calculate the concentrations of the by-products and to control the CVD reaction process based on the by-product concentrations. An exemplary CVD process is the deposition of tungsten metal on a semiconductor wafer. A preferred method and apparatus uses a capillary gas sampling device for removing the by-product gases of the reaction as a feed for the mass spectrometer. The capillary gas sampling device is preferably connected to a differential pump.

公开(公告)号：US06251775B1

公开(公告)日：2001-06-26

申请号：US09298796

申请日：1999-04-23

申请人： Douglas S. Armbrust ,  Margaret L. Gibson ,  Laura Serianni ,  Eric J. White

发明人： Douglas S. Armbrust ,  Margaret L. Gibson ,  Laura Serianni ,  Eric J. White

IPC分类号： H01L2144

CPC分类号： H01L21/76849 ,  H01L21/76867 ,  H01L21/76883 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/19042

摘要： A method for forming a semiconductor structure includes supplying a structure having an exposed last metalization layer, cleaning the last metalization layer, forming a silicide in a top portion of the last metalization layer and forming a terminal over the silicide.

摘要翻译： 一种用于形成半导体结构的方法包括提供具有暴露的最后金属化层的结构，清洗最后的金属化层，在最后一个金属化层的顶部形成硅化物并在硅化物上形成端子。