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    Low-side physical interface driver circuit for microcomputer date transmission applications
    1.
    发明授权
    Low-side physical interface driver circuit for microcomputer date transmission applications 失效
    用于微机日期传输应用的低端物理接口驱动电路

    公开(公告)号：US5917341A

    公开(公告)日：1999-06-29

    申请号：US782868

    申请日：1997-01-14

    申请人： Edward C. Suder ,  Nicholas Salamina ,  Marco Corsi

    发明人： Edward C. Suder ,  Nicholas Salamina ,  Marco Corsi

    IPC分类号： H03K19/0175 ,  H03K19/018

    CPC分类号： H03K19/017554

    摘要： Low-side driver circuit (200) for data transmission applications includes external connection (202) for connecting and providing drive current to an external physical interface circuit. Sink transistor (210) forms an isolation from the physical interface circuit, and channels low-side drive current to external connection (202). Sink transistor (210) includes base (216), collector (208), and emitter (224). Emitter follower transistor (228) associates with sink transistor (210), and in conjunction with "A" input to the gate of transistor (228), sink transistor (210) controls the state of emitter follower transistor (228). Blocking transistor (206) associates with base (216) of sink transistor (210) to block the base of sink transistor (210) in the off state of sink transistor (210). Pull-down diodes (218) and (220) associate with base (216) of sink transistor (210) to pull down the voltage of the base when sink transistor (210) is in an off state.

    摘要翻译： 用于数据传输应用的低侧驱动电路（200）包括用于连接并向外部物理接口电路提供驱动电流的外部连接（202）。 漏极晶体管（210）形成与物理接口电路的隔离，并将低端驱动电流通向外部连接（202）。 漏极晶体管（210）包括基极（216），集电极（208）和发射极（224）。 发射极跟随器晶体管（228）与吸收晶体管（210）相关联，并且与晶体管（228）的栅极的“A”输入相结合，吸收晶体管（210）控制射极跟随器晶体管（228）的状态。 阻塞晶体管（206）与宿晶体管（210）的基极（216）相关联，以将宿晶体管（210）的基极截止于晶体管（210）的截止状态。 当宿晶体管（210）处于关闭状态时，下拉二极管（218）和（220）与宿晶体管（210）的基极（216）相关联以降低基极的电压。

    High-side physical interface driver circuit for microcomputer data transmission applications
    2.
    发明授权
    High-side physical interface driver circuit for microcomputer data transmission applications 失效
    用于微机数据传输应用的高端物理接口驱动电路

    公开(公告)号：US5892378A

    公开(公告)日：1999-04-06

    申请号：US783220

    申请日：1997-01-14

    申请人： Edward C. Suder ,  Nicholas Salamina ,  Marco Corsi

    发明人： Edward C. Suder ,  Nicholas Salamina ,  Marco Corsi

    IPC分类号： H03K17/082 ,  H03K3/26

    CPC分类号： H03K17/0826

    摘要： High-side physical interface driver circuit (10), for use in a variety of data transmission applications, includes an external connection (18) for connecting and providing drive current to an external physical interface. Output transistor (16) for channeling high-side drive current to external connection (18). Output transistor (16) includes base (18), collector (14), and emitter (24). Control transistor (28) controls the on state of output transistor (16) to supply high-side drive current to external connection (18). At least one shorting transistor (30) shorts base (19) of output transistor (16) to emitter (24), when high-side voltage reaches a predetermined minimum voltage level. The breakdown prevention circuitry, including transistors (50), (52), (102 and 116), as well as associated circuitry, couples with control transistor (30) for preventing control transistor (30) from shorting due to breakdown of parasitic diodes when the high-side physical interface driver circuit reaches a predetermined maximum value.

    摘要翻译： 用于各种数据传输应用的高端物理接口驱动电路（10）包括用于连接并向外部物理接口提供驱动电流的外部连接（18）。 用于将高侧驱动电流引导到外部连接（18）的输出晶体管（16）。 输出晶体管（16）包括基极（18），集电极（14）和发射极（24）。 控制晶体管（28）控制输出晶体管（16）的导通状态，以向外部连接（18）提供高侧驱动电流。 当高侧电压达到预定的最小电压电平时，至少一个短路晶体管（30）将输出晶体管（16）的基极（19）短路到发射极（24）。 包括晶体管（50），（52），（102和116）以及相关联的电路的击穿防止电路与控制晶体管（30）耦合，用于防止控制晶体管（30）由于寄生二极管的击穿而短路 高端物理接口驱动电路达到预定的最大值。

    Complimentary driver circuit with shared voltage breakdown protection
    3.
    发明授权
    Complimentary driver circuit with shared voltage breakdown protection 失效
    免费驱动电路，共享电压故障保护

    公开(公告)号：US6140718A

    公开(公告)日：2000-10-31

    申请号：US301926

    申请日：1994-09-07

    申请人： Edward C. Suder ,  Marco Corsi ,  James M. Tran

    发明人： Edward C. Suder ,  Marco Corsi ,  James M. Tran

    IPC分类号： H03K17/0814 ,  H03K17/62 ,  H03K17/16

    CPC分类号： H03K17/6271 ,  H03K17/08146

    摘要： This is a driver circuit 100 for use in an integrated circuit 10 for driving two complimentary signals on output terminals 104 and 106. A single device, such as a Schottky diode 170, prevents voltage breakdown resulting from an externally supplied voltage on either output terminal 104, 106. The single device, such as Schottky diode 170, provides voltage breakdown protection for an output transistor 150 and a complimentary output transistor 152.The single device can be made larger than if two devices were used so that a voltage drop across the device resulting from normal forward current conduction is minimized.

    摘要翻译： 这是用于在输出端子104和106上驱动两个互补信号的集成电路10中的驱动器电路100.单个器件（例如肖特基二极管170）防止由输出端子104上的外部提供的电压引起的电压击穿 单个器件，例如肖特基二极管170，为输出晶体管150和互补输出晶体管152提供电压击穿保护。单个器件可以制造得比使用两个器件大，使得器件上的电压降 由正常正向电流导通导致的电流最小化。

    Track-and-hold circuit with low distortion
    6.
    发明授权
    Track-and-hold circuit with low distortion 有权
    具有低失真的跟踪保持电路

    公开(公告)号：US08305114B2

    公开(公告)日：2012-11-06

    申请号：US12862455

    申请日：2010-08-24

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03K5/00

    CPC分类号： G11C27/026 ,  H03M1/0624 ,  H03M1/1245

    摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.

    摘要翻译： 提供跟踪和保持电路。 该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。 优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点 电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。 然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到 差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

    System and method for implementing low-cost electronic gyroscopes and accelerometer
    7.
    发明授权
    System and method for implementing low-cost electronic gyroscopes and accelerometer 有权
    实现低成本电子陀螺仪和加速度计的系统和方法

    公开(公告)号：US08258774B2

    公开(公告)日：2012-09-04

    申请号：US12613049

    申请日：2009-11-05

    申请人： Chih-Ming Hung ,  Marco Corsi

    发明人： Chih-Ming Hung ,  Marco Corsi

    IPC分类号： G01R23/12 ,  G01P15/00

    CPC分类号： G01C19/64 ,  G01R25/00

    摘要： Accelerometers have a number of wide-ranging uses, and it is desirable to both increase their accuracy while decreasing size. Here, millimeter or sub-millimeter wavelength accelerometers are provided which has the advantage of having the high accuracy of an optical accelerometer, while being compact. Additionally, because millimeter or sub-millimeter wavelength signals are employed, cumbersome and awkward on-chip optical devices and bulky optical mediums can be avoided.

    摘要翻译： 加速度计有许多广泛的用途，并且希望在减小尺寸的同时提高精度。 这里，提供毫米波或亚毫米波长的加速度计，其具有在紧凑的同时具有光学加速度计的高精度的优点。 此外，由于采用了毫米波或亚毫米波长的信号，因此可以避免繁琐笨重的片上光学器件和庞大的光学介质。

    TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION
    9.
    发明申请
    TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION 有权
    具有低失真的跟踪和保持电路

    公开(公告)号：US20110043257A1

    公开(公告)日：2011-02-24

    申请号：US12862455

    申请日：2010-08-24

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03K5/00

    CPC分类号： G11C27/026 ,  H03M1/0624 ,  H03M1/1245

    摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.

    摘要翻译： 提供跟踪和保持电路。 该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。 优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点 电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。 然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到 差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

    Method and apparatus of SFDR enhancement
    10.
    发明授权
    Method and apparatus of SFDR enhancement 有权
    SFDR增强的方法和装置

    公开(公告)号：US07804337B2

    公开(公告)日：2010-09-28

    申请号：US12393182

    申请日：2009-02-26

    申请人： Robert F. Payne ,  Marco Corsi

    发明人： Robert F. Payne ,  Marco Corsi

    IPC分类号： H03K5/00

    CPC分类号： H03M1/0836 ,  G11C27/026 ,  H03M1/0682 ,  H03M1/069 ,  H03M1/1245 ,  H03M1/164

    摘要： A track-and-hold or sample-and-hold (S/H) circuit for an analog-to-digital converter (ADC) is provided. A difference between the disclosed S/H circuit and conventional S/H circuits is the use of a peaking circuit. This peaking circuit generally provides increased current to switching transistor when transitioning between track and hold which can increase the Spurious-Free Dynamic Range (SFDR) as low frequencies, by as much as 15dB.

    摘要翻译： 提供了用于模数转换器（ADC）的跟踪保持或采样保持（S / H）电路。 所公开的S / H电路和常规S / H电路之间的区别在于使用峰值电路。 该峰值电路通常在轨道和保持之间转换时向开关晶体管提供增加的电流，这可以将无杂散动态范围（SFDR）降低多达15dB。