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    Track-and-hold circuit with low distortion
    3.
    发明授权
    Track-and-hold circuit with low distortion 有权
    具有低失真的跟踪保持电路

    公开(公告)号：US08305114B2

    公开(公告)日：2012-11-06

    申请号：US12862455

    申请日：2010-08-24

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03K5/00

    CPC分类号： G11C27/026 ,  H03M1/0624 ,  H03M1/1245

    摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.

    摘要翻译： 提供跟踪和保持电路。 该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。 优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点 电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。 然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到 差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

    TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION
    4.
    发明申请
    TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION 有权
    具有低失真的跟踪和保持电路

    公开(公告)号：US20110043257A1

    公开(公告)日：2011-02-24

    申请号：US12862455

    申请日：2010-08-24

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03K5/00

    CPC分类号： G11C27/026 ,  H03M1/0624 ,  H03M1/1245

    摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.

    摘要翻译： 提供跟踪和保持电路。 该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。 优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点 电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。 然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到 差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

    Method and apparatus of SFDR enhancement
    5.
    发明授权
    Method and apparatus of SFDR enhancement 有权
    SFDR增强的方法和装置

    公开(公告)号：US07804337B2

    公开(公告)日：2010-09-28

    申请号：US12393182

    申请日：2009-02-26

    申请人： Robert F. Payne ,  Marco Corsi

    发明人： Robert F. Payne ,  Marco Corsi

    IPC分类号： H03K5/00

    CPC分类号： H03M1/0836 ,  G11C27/026 ,  H03M1/0682 ,  H03M1/069 ,  H03M1/1245 ,  H03M1/164

    摘要： A track-and-hold or sample-and-hold (S/H) circuit for an analog-to-digital converter (ADC) is provided. A difference between the disclosed S/H circuit and conventional S/H circuits is the use of a peaking circuit. This peaking circuit generally provides increased current to switching transistor when transitioning between track and hold which can increase the Spurious-Free Dynamic Range (SFDR) as low frequencies, by as much as 15dB.

    摘要翻译： 提供了用于模数转换器（ADC）的跟踪保持或采样保持（S / H）电路。 所公开的S / H电路和常规S / H电路之间的区别在于使用峰值电路。 该峰值电路通常在轨道和保持之间转换时向开关晶体管提供增加的电流，这可以将无杂散动态范围（SFDR）降低多达15dB。

    Track-and-hold circuit with low distortion
    6.
    发明授权
    Track-and-hold circuit with low distortion 有权
    具有低失真的跟踪保持电路

    公开(公告)号：US07804336B2

    公开(公告)日：2010-09-28

    申请号：US12393164

    申请日：2009-02-26

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03K5/00

    CPC分类号： G11C27/026 ,  H03M1/0624 ,  H03M1/1245

    摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.

    摘要翻译： 提供跟踪和保持电路。 该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。 优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点 电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。 然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到 差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

    Pipelined ADC having a three-level DAC elements
    8.
    发明授权
    Pipelined ADC having a three-level DAC elements 有权
    流水线ADC具有三电平DAC元件

    公开(公告)号：US08269661B2

    公开(公告)日：2012-09-18

    申请号：US12904688

    申请日：2010-10-14

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03M1/34

    CPC分类号： H03M1/069 ,  H03M1/44

    摘要： In conventional pipelined analog-to-digital converters (ADCs), it is common to employ digital-to-analog converters (DACs) in the ADC stages that use two-state switches or segments. A problem with this arrangement is that for each DAC state there is a noise contribution from each DAC switch, resulting from its current source. Here, however, a DAC is employed that uses three-state DAC switches, which reduces the noise contributions from the DAC switches' current sources and reduces the amount of area used.

    摘要翻译： 在传统的流水线模数转换器（ADC）中，通常在使用两态开关或段的ADC级中采用数模转换器（DAC）。 这种安排的一个问题是，对于每个DAC状态，每个DAC开关都有来自其当前源的噪声贡献。 然而，这里使用DAC，其使用三态DAC开关，其减少了DAC开关的电流源的噪声贡献，并减少了使用的面积。

    Error correction method and apparatus
    9.
    发明授权
    Error correction method and apparatus 有权
    纠错方法及装置

    公开(公告)号：US08018369B2

    公开(公告)日：2011-09-13

    申请号：US12896603

    申请日：2010-10-01

    申请人： Robert F. Payne ,  Marco Corsi

    发明人： Robert F. Payne ,  Marco Corsi

    IPC分类号： H03M1/38

    CPC分类号： G05F3/265

    摘要： A switched current source is provided. The switched current source is generally comprised of transistors and resistors, and the source has a high output impedance. Included with the switched current source is an error correction transistor and a resistor that cooperate to feed a current back through a bias transistor to correct an error that generally results from the current gains or β's of transistors within the switched current source. To accomplish this, however, the resistor is selected to have a value that is sufficiently large such that current from the error correction transistor flows back through the bias transistor.

    摘要翻译： 提供开关电流源。 开关电流源通常由晶体管和电阻组成，源极具有高输出阻抗。 与切换的电流源一起包括纠错晶体管和电阻器，其协作以通过偏置晶体管馈送电流以校正通常由开关电流源内的晶体管的电流增益或电流导致的误差。 然而，为了实现这一点，电阻器被选择为具有足够大的值，使得来自误差校正晶体管的电流流过偏置晶体管。

    HIGH SPEED LATCHED COMPARATOR
    10.
    发明申请
    HIGH SPEED LATCHED COMPARATOR 审中-公开
    高速封锁比较器

    公开(公告)号：US20090021283A1

    公开(公告)日：2009-01-22

    申请号：US11957640

    申请日：2007-12-17

    申请人： Robert F. Payne ,  Marco Corsi

    发明人： Robert F. Payne ,  Marco Corsi

    IPC分类号： H03K5/22

    CPC分类号： H03K3/356139

    摘要： An improved latched comparator, including a track mode circuit, a latch and a latch and track select circuit. The track mode circuit includes two transistors having their sources connected together, and their respective gates receiving a respective first and second input, and their drains connected to the power supply by respective resistors. The latch includes a further two transistors having their sources connected together, a gate of each connected to a drain of the other, and their drains connected to a respective one of the common connection node of the first transistor and the first resistor, and the second transistor and the second resistor. The latch and track select circuit includes a further transistor having an source connected to a current sink connected to ground, having a gate connected to receive a track signal and having a drain connected to the common connection node of the first and second transistors, and a still further transistor having a source connected to the current sink connected to ground, having a gate connected to receive a latch signal and having a drain connected to the common connection node of the third and fourth transistors. Bipolar embodiments are also included.

    摘要翻译： 一种改进的锁存比较器，包括轨道模式电路，锁存器和锁存和轨道选择电路。 轨道模式电路包括其源极连接在一起的两个晶体管，并且其各自的栅极接收相应的第一和第二输入端，并且它们的漏极通过相应的电阻器连接到电源。 锁存器包括另外两个晶体管，其源极连接在一起，每个晶体管连接到另一个的漏极，并且其漏极连接到第一晶体管和第一电阻器的公共连接节点中的相应一个， 晶体管和第二个电阻。 锁存和轨道选择电路包括另外的晶体管，其具有连接到连接到地的电流宿的源极，具有连接到栅极的栅极，其接收轨道信号并具有连接到第一和第二晶体管的公共连接节点的漏极，以及 另一个晶体管具有连接到连接到地的电流宿的源极，其具有连接的栅极，以接收锁存信号，并且具有连接到第三和第四晶体管的公共连接节点的漏极。 还包括双极实施例。