公开(公告)号：US6080617A

公开(公告)日：2000-06-27

申请号：US950920

申请日：1997-10-15

申请人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

发明人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/06 ,  H01L27/115 ,  H01L29/92

CPC分类号： H01L27/11502 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/1085 ,  H01L27/11507 ,  H01L28/40 ,  H01L28/55

摘要： A semiconductor device comprising an integrated circuit and a capacitor. In this capacitor, a bottom electrode, a dielectric film and a top electrode are formed, independently of the integrated circuit, on the interlayer insulating film, and the top electrode and bottom electrode are connected with metal interconnections through contact holes opened in the protective film for protecting the surface of the capacitor. In this constitution, either the top electrode or the bottom electrode is connected the bias line of the integrated circuit, and the other is connected to the ground line, so that extraneous emission may be reduced without having to connect the capacitor outside.

摘要翻译： 一种包括集成电路和电容器的半导体器件。 在该电容器中，在层间绝缘膜上形成独立于集成电路的底电极，电介质膜和顶电极，并且顶电极和底电极通过在保护膜中开口的接触孔与金属互连连接 用于保护电容器的表面。 在这种结构中，顶部电极或底部电极与集成电路的偏置线连接，另一个连接到接地线，使得可以减少外部发射而不必将电容器连接到外部。

公开(公告)号：US06126752A

公开(公告)日：2000-10-03

申请号：US947712

申请日：1997-10-09

申请人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

发明人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/06 ,  H01L27/115 ,  H01L29/92 ,  B05B5/057

CPC分类号： H01L27/11502 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/1085 ,  H01L27/11507 ,  H01L28/40 ,  H01L28/55

摘要： A semiconductor device comprising an integrated circuit and a capacitor. In this capacitor, a bottom electrode, a dielectric film and a top electrode are formed, independently of the integrated circuit, on the interlayer insulating film, and the top electrode and bottom electrode are connected with metal interconnections through contact holes opened in the protective film for protecting the surface of the capacitor. In this constitution, either the top electrode or the bottom electrode is connected the bias line of the integrated circuit, and the other is connected to the ground line, so that extraneous emission may be reduced without having to connect the capacitor outside.

摘要翻译： 一种包括集成电路和电容器的半导体器件。 在该电容器中，在层间绝缘膜上形成独立于集成电路的底电极，电介质膜和顶电极，并且顶电极和底电极通过在保护膜中开口的接触孔与金属互连连接 用于保护电容器的表面。 在这种结构中，顶部电极或底部电极与集成电路的偏置线连接，另一个连接到接地线，使得可以减少外部发射而不必将电容器连接到外部。

公开(公告)号：US5717233A

公开(公告)日：1998-02-10

申请号：US778953

申请日：1997-01-06

申请人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

发明人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/06 ,  H01L27/115 ,  H01L29/92 ,  H01L29/76

CPC分类号： H01L27/11502 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/1085 ,  H01L27/11507 ,  H01L28/40 ,  H01L28/55

摘要： A semiconductor device comprising an integrated circuit and a capacitor. In this capacitor, a bottom electrode, a dielectric film and a top electrode are formed, independently of the integrated circuit, on the interlayer insulating film, and the top electrode and bottom electrode are connected with metal interconnections through contact holes opened in the protective film for protecting the surface of the capacitor. In this constitution, either the top electrode or the bottom electrode is connected the bias line of the integrated circuit, and the other is connected to the ground line, so that extraneous emission may be reduced without having to connect the capacitor outside.

摘要翻译： 一种包括集成电路和电容器的半导体器件。 在该电容器中，在层间绝缘膜上形成独立于集成电路的底电极，电介质膜和顶电极，并且顶电极和底电极通过在保护膜中开口的接触孔与金属互连连接 用于保护电容器的表面。 在这种结构中，顶部电极或底部电极与集成电路的偏置线连接，另一个连接到接地线，使得可以减少外部发射而不必将电容器连接到外部。

公开(公告)号：US5661319A

公开(公告)日：1997-08-26

申请号：US681093

申请日：1996-07-22

申请人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Tooru Nasu ,  Akihiro Matsuda ,  Tatsuo Ootsuki

发明人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Tooru Nasu ,  Akihiro Matsuda ,  Tatsuo Ootsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  H01L29/92 ,  H01L29/94 ,  H01G7/06

CPC分类号： H01L29/94 ,  H01L27/10808 ,  H01L27/10852 ,  H01L27/1203 ,  H01L28/55 ,  H01L29/78654 ,  H01L28/75

摘要： This is a semiconductor device having an integrated circuit and a capacitor formed on a semiconductor substrate. The capacitor comprises a bottom electrode serving also as a part of a diffusion layer of the integrated circuit, a dielectric film being formed on the bottom electrode, and a top electrode of a conductive film being formed on the dielectric film. In particular, it is preferred to form the dielectric film in two layers of dielectric film, and compose the dielectric film contacting with the bottom electrode of a dielectric material in a composition possessing an excess of a metal element than the stoichiometric composition.

摘要翻译： 这是具有形成在半导体衬底上的集成电路和电容器的半导体器件。 电容器包括还用作集成电路的扩散层的一部分的底部电极，形成在底部电极上的电介质膜和形成在电介质膜上的导电膜的顶部电极。 特别地，优选将电介质膜形成为两层电介质膜，并且构成与具有比化学计量组成更多的金属元素的组成的与电介质材料的底电极接触的电介质膜。

公开(公告)号：US06294438B1

公开(公告)日：2001-09-25

申请号：US09589520

申请日：2000-06-08

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US6107657A

公开(公告)日：2000-08-22

申请号：US71121

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/72

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US06333528B1

公开(公告)日：2001-12-25

申请号：US09071795

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US6015987A

公开(公告)日：2000-01-18

申请号：US71122

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/108 ,  H01L29/00 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5624864A

公开(公告)日：1997-04-29

申请号：US284984

申请日：1994-08-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US06169304A

公开(公告)日：2001-01-02

申请号：US09071534

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。