公开(公告)号：US07507620B2

公开(公告)日：2009-03-24

申请号：US11159991

申请日：2005-06-23

Applicant: Emmanuel Collard ,  Patrick Poveda

Inventor： Emmanuel Collard ,  Patrick Poveda

IPC: H01L21/8234

CPC classification number: H01L29/868 ,  H01L29/8613

Abstract: A vertical diode of low capacitance formed in a front surface of a semiconductor substrate, including a first area protruding from the substrate surface including at least one doped semiconductor layer of a conductivity type opposite to that of the substrate, the upper surface of the semiconductor layer supporting a first welding ball. The diode includes a second area including on the substrate a thick conductive track supporting at least two second welding balls, said first and second welding balls defining a plane parallel to the substrate plane.

Abstract translation: 一种低电容的垂直二极管，其形成在半导体衬底的前表面中，包括从衬底表面突出的第一区域，该第一区域包括至少一个与衬底相反的导电类型的掺杂半导体层，半导体层的上表面 支持第一焊球。 二极管包括第二区域，该第二区域包括在基板上的支撑至少两个第二焊球的厚导电轨道，所述第一焊球和第二焊球限定平行于衬底平面的平面。

公开(公告)号：US07692262B2

公开(公告)日：2010-04-06

申请号：US10885996

申请日：2004-07-07

Applicant: Jean-Luc Morand ,  Emmanuel Collard ,  André Lhorte

Inventor： Jean-Luc Morand ,  Emmanuel Collard ,  André Lhorte

IPC: H01L27/095 ,  H01L29/74

CPC classification number: H01L29/8611 ,  H01L27/0788 ,  H01L27/0814 ,  H01L29/872

Abstract: A vertical rectifying and protection power diode, formed in a lightly-doped semiconductor layer of a first conductivity type, resting on a heavily-doped substrate of the first conductivity type, having a first ring-shaped region, of the first conductivity type more heavily-doped than the layer and more lightly doped than the substrate, surrounding an area of the layer and extending to the substrate; and a second ring-shaped region, doped of the second conductivity type, extending at the surface of the first region and on either side thereof; a first electrode having a thin layer of a material capable of forming a Schottky diode with the layer, resting on the area of the layer and on at least a portion of the second ring-shaped region with which it forms an ohmic contact.

Abstract translation: 形成在第一导电类型的轻掺杂半导体层中的垂直整流和保护功率二极管，其位于第一导电类型的重掺杂衬底上，具有第一导电类型的第一环形区域 与该衬底相比掺杂并且比衬底更轻地掺杂，围绕该层的区域并延伸到衬底; 以及在所述第一区域的表面和其任一侧上延伸的第二导电类型的第二环形区域; 第一电极，其具有能够与所述层形成肖特基二极管的材料的薄层，搁置在所述层的区域上以及在形成欧姆接触的第二环形区域的至少一部分上。

公开(公告)号：US06576973B2

公开(公告)日：2003-06-10

申请号：US09747781

申请日：2000-12-22

Applicant: Emmanuel Collard ,  André Lhorte

Inventor： Emmanuel Collard ,  André Lhorte

IPC: H01L29872

CPC classification number: H01L29/66143 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/872

Abstract: A vertical Schottky diode including an N-type silicon carbide layer of low doping level formed by epitaxy on a silicon carbide substrate of high doping level. The periphery of the active area of the diode is coated with a P-type epitaxial silicon carbide layer. A trench crosses the P-type epitaxial layer and penetrates into at least a portion of the height of the N-type epitaxial layer beyond the periphery of the active area. The doping level of the P-type epitaxial layer is chosen so that, for the maximum voltage that the diode is likely to be subjected to, the equipotential surfaces corresponding to approximately ¼ to ¾ of the maximum voltage extend up to the trench.

Abstract translation: 一种垂直肖特基二极管，包括通过在高掺杂水平的碳化硅衬底上外延生长的低掺杂水平的N型碳化硅层。 二极管的有源区域的周围涂覆有P型外延碳化硅层。 沟槽穿过P型外延层，并且穿过N型外延层的至少一部分高于有效区域的周边的高度。 选择P型外延层的掺杂水平，使得对于二极管可能经受的最大电压，对应于最大电压的大约1/4至3/4的等势面延伸到沟槽。

公开(公告)号：US20050242363A1

公开(公告)日：2005-11-03

申请号：US11159991

申请日：2005-06-23

Applicant: Emmanuel Collard ,  Patrick Poveda

Inventor： Emmanuel Collard ,  Patrick Poveda

IPC: H01L29/861 ,  H01L29/868 ,  H01L29/22

CPC classification number: H01L29/868 ,  H01L29/8613

Abstract: A vertical diode of low capacitance formed in a front surface of a semiconductor substrate, including a first area protruding from the substrate surface including at least one doped semiconductor layer of a conductivity type opposite to that of the substrate, the upper surface of the semiconductor layer supporting a first welding ball. The diode includes a second area including on the substrate a thick conductive track supporting at least two second welding balls, said first and second welding balls defining a plane parallel to the substrate plane.

Abstract translation: 一种低电容的垂直二极管，其形成在半导体衬底的前表面中，包括从衬底表面突出的第一区域，该第一区域包括至少一个与衬底相反的导电类型的掺杂半导体层，半导体层的上表面 支持第一焊球。 二极管包括第二区域，该第二区域包括在基板上的支撑至少两个第二焊球的厚导电轨道，所述第一焊球和第二焊球限定平行于衬底平面的平面。

公开(公告)号：US20050006662A1

公开(公告)日：2005-01-13

申请号：US10885996

申请日：2004-07-07

Applicant: Jean-Luc Morand ,  Emmanuel Collard ,  Andre Lhorte

Inventor： Jean-Luc Morand ,  Emmanuel Collard ,  Andre Lhorte

IPC: H01L27/07 ,  H01L27/08 ,  H01L29/47 ,  H01L29/861 ,  H01L29/872 ,  H01L29/74

CPC classification number: H01L29/8611 ,  H01L27/0788 ,  H01L27/0814 ,  H01L29/872

Abstract: A vertical rectifying and protection power diode, formed in a lightly-doped semiconductor layer of a first conductivity type, resting on a heavily-doped substrate of the first conductivity type, having a first ring-shaped region, of the first conductivity type more heavily-doped than the layer and more lightly doped than the substrate, surrounding an area of the layer and extending to the substrate; and a second ring-shaped region, doped of the second conductivity type, extending at the surface of the first region and on either side thereof; a first electrode having a thin layer of a material capable of forming a Schottky diode with the layer, resting on the area of the layer and on at least a portion of the second ring-shaped region with which it forms an ohmic contact.

Abstract translation: 形成在第一导电类型的轻掺杂半导体层中的垂直整流和保护功率二极管，其位于第一导电类型的重掺杂衬底上，具有第一导电类型的第一环形区域 与该衬底相比掺杂并且比衬底更轻地掺杂，围绕该层的区域并延伸到衬底; 以及在所述第一区域的表面和其任一侧上延伸的第二导电类型的第二环形区域; 第一电极，其具有能够与所述层形成肖特基二极管的材料的薄层，搁置在所述层的区域上以及在形成欧姆接触的第二环形区域的至少一部分上。

公开(公告)号：US06924546B2

公开(公告)日：2005-08-02

申请号：US10489153

申请日：2002-09-10

Applicant: Emmanuel Collard ,  Patrick Poveda

Inventor： Emmanuel Collard ,  Patrick Poveda

IPC: H01L29/861 ,  H01L29/868 ,  H01L31/105

CPC classification number: H01L29/868 ,  H01L29/8613

Abstract: The invention concerns a low-capacity vertical diode designed to be mounted by a front surface made in a semiconductor substrate (1), comprising a first zone projecting relative to the surface of the substrate including at least a semiconductor layer (3) doped with a type of conductivity opposite to that of the substrate, the upper surface of the semiconductor layer bearing a first solder bump (23). The diode comprises a second zone including on the substrate a thick strip conductor (16) bearing at least second solder bumps (24), said first and second solder bumps defining a plane parallel to the substrate plane.

Abstract translation: 本发明涉及一种设计成由半导体衬底（1）制成的前表面安装的低容量垂直二极管，包括相对于衬底的表面突出的第一区域，该第一区域包括至少掺杂有半导体衬底的半导体层（3） 类型的导电性与衬底的导电性相反，半导体层的上表面具有第一焊料凸点（23）。 所述二极管包括第二区域，所述第二区域在所述衬底上具有承载至少第二焊料凸块（24）的厚条状导体（16），所述第一和第二焊料凸块限定平行于所述衬底平面的平面。

公开(公告)号：US06897133B2

公开(公告)日：2005-05-24

申请号：US10415425

申请日：2001-10-30

Applicant: Emmanuel Collard

Inventor： Emmanuel Collard

IPC: H01L21/04 ,  H01L29/872 ,  H01L21/28 ,  H01L21/44

CPC classification number: H01L29/6606 ,  H01L21/0455 ,  H01L29/0619 ,  H01L29/872 ,  Y10S438/931

Abstract: The invention concerns a method for making a vertical Schottky diode on a highly doped N-type silicon carbide substrate (1), comprising steps which consist in forming an N-type lightly doped epitaxial layer (2); etching out a peripheral trench at the active zone of the diode; forming a type P doped epitaxial layer; carrying out a planarization process so that a ring (6) of the P type epitaxial layer remains in the trench; forming an insulating layer (3) on the outer periphery of the component, said insulating layer partly covering said ring; and depositing a metal (4) capable of forming a Schottky barrier with the N type epitaxial layer.

Abstract translation: 本发明涉及一种用于在高掺杂N型碳化硅衬底（1）上制造垂直肖特基二极管的方法，包括形成N型轻掺杂外延层（2）的步骤。 在二极管的有源区蚀刻外围沟槽; 形成P型掺杂外延层; 进行平坦化处理，使得P型外延层的环（6）保留在沟槽中; 在所述部件的外周上形成绝缘层（3），所述绝缘层部分覆盖所述环; 以及用N型外延层沉积能够形成肖特基势垒的金属（4）。