Probe tip locator having improved marker arrangement for reduced bit encoding error
    3.
    发明授权
    Probe tip locator having improved marker arrangement for reduced bit encoding error 有权
    探针尖端定位器具有改进的标记布置以减少位编码误差

    公开(公告)号:US06425189B1

    公开(公告)日:2002-07-30

    申请号:US09552892

    申请日:2000-04-20

    IPC分类号: G01B900

    摘要: A probe tip locator for, and method of, use in determining a location of a probe tip relative to the probe tip locator comprising sets of discrete location markers in which numbers and positions of the location markers in each of the sets are employable uniquely to identify corresponding specific locations on the probe tip locator, the sets being distributed about the probe tip locator to avoid unbalanced partial encroachments into both sides of a scanpath of the probe tip by location markers in sets normally adjacent the scanpath thereby to prevent an erroneous determination of location caused by unbalanced partial encroachments of the location markers into both sides of the scanpath as the probe tip traverses the scanpath.

    摘要翻译: 用于确定探针尖端相对于探针尖端定位器的位置的探针尖端定位器,其包括一组离散位置标记,其中每个组中的位置标记的数量和位置可用于唯一地识别 探针尖端定位器上的对应的特定位置,这些组围绕探针尖端定位器分布,以避免通常位于与扫描路径相邻的组中的位置标记在探针尖端的扫描路径的两侧不平衡的部分侵入,从而防止位置的错误确定 由于探针尖端穿过扫描路径,位置标记不均匀部分侵入扫描路径的两侧。

    Method of mapping a surface using a probe for stylus nanoprofilometry having a non-circular cross-section
    4.
    发明授权
    Method of mapping a surface using a probe for stylus nanoprofilometry having a non-circular cross-section 有权
    使用具有非圆形横截面的触笔纳米流变测定法的探针绘制表面的方法

    公开(公告)号:US06250143B1

    公开(公告)日:2001-06-26

    申请号:US09386711

    申请日:1999-08-31

    IPC分类号: G01H2300

    摘要: The present invention provides an apparatus and a method of manufacturing that apparatus. More specifically, to a method of manufacturing probes for a stylus nanoprofilometer having a non-circular probe tip geometry and a method of measurement of semiconductor wafer features using the same. In one embodiment, the probe comprises an upper portion couplable to the stylus nanoprofilometer and a probative portion coupled to the upper portion. The probative portion has a cross section that is substantially thinner than a cross section of the upper portion. The probative portion further has a terminus distal the upper portion and a reentrant angle from the terminus to the upper portion.

    摘要翻译: 本发明提供一种制造该装置的装置和方法。 更具体地,涉及一种制造具有非圆形探针尖端几何形状的触针式纳米探针计探针的探针的方法和使用其的半导体晶片特征的测量方法。 在一个实施例中,探针包括可与触针纳米玻璃体计量器耦合的上部和耦合到上部的识别部分。 证明部分具有比上部的横截面更薄的横截面。 证明部分还具有远离上部的终端和从终端到上部的折返角。

    Modular semiconductor substrates
    5.
    发明授权
    Modular semiconductor substrates 有权
    模块化半导体衬底

    公开(公告)号:US06534851B1

    公开(公告)日:2003-03-18

    申请号:US09642376

    申请日:2000-08-21

    IPC分类号: H01L2306

    摘要: A modular substrate-based processing scheme for producing semiconductor devices provides multiple modular processing units which may be arranged together to form any of various cohesive processing units or they may be individually or sequentially processed through standard semiconductor processing equipment. The cohesive processing units are processed unitarily providing for multiple modular processing units to be processed simultaneously. The modular processing units may be formed of a thick semiconductor substrate or a semiconductor substrate mounted on a further substrate such as a ceramic material. The modular processing units may each contain ribs, grooves, posts or other features to aid in handling and placement of the individual units.

    摘要翻译: 用于制造半导体器件的基于模块化基板的处理方案提供多个模块化处理单元,其可以被布置在一起以形成各种内聚处理单元中的任何一个,或者可以通过标准半导体处理设备单独或顺序地处理。 整体处理单元被一体处理,提供要同时处理的多个模块化处理单元。 模块化处理单元可以由安装在诸如陶瓷材料的另外的基板上的厚半导体衬底或半导体衬底形成。 模块化处理单元可以各自包含肋,槽,柱或其他特征以帮助处理和放置各个单元。

    Semiconductor manufacturing using modular substrates
    6.
    发明授权
    Semiconductor manufacturing using modular substrates 有权
    使用模块化基板的半导体制造

    公开(公告)号:US06713409B2

    公开(公告)日:2004-03-30

    申请号:US10303280

    申请日:2002-11-25

    IPC分类号: H01L2100

    摘要: A manufacturing method using a modular substrate-based processing scheme for producing semiconductor devices, provides multiple modular processing units which may be arranged together to form any of various cohesive processing units or individually or sequentially processed through standard semiconductor processing equipment. The cohesive processing units are processed unitarily providing for multiple modular processing units to be processed simultaneously. The modular processing units may be formed of a thick semiconductor substrate or a semiconductor substrate mounted on a further substrate such as a ceramic material. The modular processing units may each contain ribs, grooves, posts or other features to aid in handling and placement of the individual units.

    摘要翻译: 使用基于模块化的基于基板的处理方法来制造半导体器件的制造方法提供了多个模块化处理单元,其可以被布置在一起以形成任何各种内聚处理单元,或者通过标准半导体处理设备单独地或顺序地处理。 整体处理单元被一体处理,提供要同时处理的多个模块化处理单元。 模块化处理单元可以由安装在诸如陶瓷材料的另外的基板上的厚半导体衬底或半导体衬底形成。 模块化处理单元可以各自包含肋,槽,柱或其他特征以帮助处理和放置各个单元。

    Method and apparatus for minimizing semiconductor wafer contamination
    7.
    发明授权
    Method and apparatus for minimizing semiconductor wafer contamination 有权
    用于最小化半导体晶片污染的方法和设备

    公开(公告)号:US06695572B2

    公开(公告)日:2004-02-24

    申请号:US09966156

    申请日:2001-09-28

    IPC分类号: B65G4907

    CPC分类号: H01L21/6732

    摘要: A method and apparatus for minimizing the surface contamination of semiconductor wafers (11) during the semiconductor device manufacturing process. Semiconductor wafers (11) are stored in a storage cassette (12) with their face sides (17) facing downward and their back sides (16) facing upward. Particulate contamination present on the back sides of the wafers is thereby secured to the wafers by the force of gravity, and the faces of the wafers are shielded from falling debris. An automated wafer handling device (19) is provided with a rotary joint (22) to accomplish the wafer flipping motion before inserting a wafer into a cassette and after removing the wafer from the cassette.

    摘要翻译: 一种在半导体器件制造过程中最小化半导体晶片(11)的表面污染的方法和装置。 半导体晶片(11)被储存在存储盒(12)中,其表面(17)面向下并且它们的背面(16)面向上。 因此,通过重力将晶片的背面存在的颗粒污染物固定在晶片上,并且晶片的表面被遮蔽而不会掉落。 自动晶片处理装置(19)设置有旋转接头(22),以在将晶片插入盒内并在从盒中取出晶片之后实现晶片翻转运动。

    X-ray system
    8.
    发明授权
    X-ray system 有权
    X光系统

    公开(公告)号:US06606371B2

    公开(公告)日:2003-08-12

    申请号:US09745236

    申请日:2000-12-19

    IPC分类号: G21K106

    摘要: A reflective lens with at least one curved surface formed of polycrystalline material. In one embodiment, a lens structure includes a substrate having a surface of predetermined curvature and a film formed along a surface of the substrate with multiple individual members each having at least one similar orientation relative to the portion of the substrate surface adjacent the member such that collectively the members provide predictable angles for diffraction of x-rays generated from a common source. A system is also provided for performing an operation with x-rays. In one embodiment, a system includes a source for generating the x-rays, a polycrystalline surface region having crystal spacing suitable for reflecting a plurality of x-rays at the same Bragg angle along the region, and transmitting the reflected x-rays to a reference position. An associated method includes providing x-rays to polycrystalline surface region having crystal spacings suitable for reflecting a plurality of x-rays at the same Bragg angle along the region, transmitting the reflected x-rays to a reference position and positioning a sample between the surface region and the reference position so that the x-rays are transmitted through the sample.

    摘要翻译: 具有由多晶材料形成的至少一个曲面的反射透镜。 在一个实施例中,透镜结构包括具有预定曲率的表面的基底和沿着基底的表面形成的膜,多个单独的构件各自具有相对于邻近构件的基底表面的部分的至少一个相似的取向,使得 共同地,这些构件为从公共源产生的x射线的衍射提供可预测的角度。 还提供了一种用于使用X射线进行操作的系统。 在一个实施例中,系统包括用于产生x射线的源,具有适合于沿着该区域以相同的布拉格角反射多个x射线的晶体间距的多晶表面区域,以及将反射的x射线透射到 参考位置。 相关联的方法包括向具有晶体间距的多晶表面区域提供x射线,该晶体间距适于沿着该区域以相同的布拉格角反射多个x射线,将反射的x射线透射到参考位置,并将样品定位在表面 区域和参考位置,使得x射线透射通过样品。

    Three dimensional reconstruction metrology
    9.
    发明授权
    Three dimensional reconstruction metrology 有权
    三维重建计量学

    公开(公告)号:US06714892B2

    公开(公告)日:2004-03-30

    申请号:US09967119

    申请日:2001-09-28

    IPC分类号: G06F1500

    摘要: A system and method of metrology (10) whereby a three dimensional shape profile is defined (16) for a surface feature on a substrate by applying (38) a transform function F(x) to an image intensity map I(x,y) obtained (40) by inspecting the substrate with a scanning electron microscope (12). The transform function F(x) is developed (34) by correlating the image intensity map of a first wafer (18) to a height vector (32) obtained by inspecting the first wafer with a more accurate metrology tool, for example a stylus nanoprofilometer (14). A simple ratio-based transform may be used to develop F(x). An asymmetric multiple parameter characterization of the three dimensional shape profile may be developed (74) by plotting critical space and width dimensions (SL, SR, W1, WR) from a vertical axis (C—C) as a function of height of the feature.

    摘要翻译: 一种计量系统和方法(10),其中通过将变换函数F(x)应用于图像强度图I(x,y)(38)来定义(16)用于衬底上的表面特征的三维形状轮廓, 通过用扫描电子显微镜(12)检查基板得到(40)。 通过将第一晶片(18)的图像强度图与通过用更精确的计量工具检查第一晶片获得的高度矢量(32)相关联来开发变换函数F(x),例如,触笔纳米玻璃体计 (14)。 可以使用简单的基于比例的变换来开发F(x)。 可以通过从垂直轴(C-C)绘制关键空间和宽度尺寸(SL,SR,W1,WR)作为特征的高度的函数来开发三维形状轮廓的不对称多参数表征(74)。

    Linewidth metrology of integrated circuit structures
    10.
    发明授权
    Linewidth metrology of integrated circuit structures 失效
    集成电路结构的线宽度量

    公开(公告)号:US5804460A

    公开(公告)日:1998-09-08

    申请号:US931066

    申请日:1997-09-15

    摘要: Illustratively, the present invention includes a method of integrated circuit manufacturing which includes forming a raised topological feature upon a first substrate. A portion of the raised feature is removed, thereby exposing a cross sectional view of the raised feature with the substrate remaining substantially undamaged. The cross sectional view has a critical dimension. The critical dimension of the cross sectional view is measured using a first measuring instrument. Then the critical dimension is measured using a second measuring instrument. The measurements of the first and second measuring instruments are correlated. Then, using the second measuring instrument, raised features via plurality of second substrates are measured.

    摘要翻译: 说明性地,本发明包括集成电路制造方法,其包括在第一基板上形成凸起的拓扑特征。 升高的部分的一部分被去除,从而暴露凸​​起特征的横截面图,其中基底保持基本上未损坏。 截面图具有临界尺寸。 使用第一测量仪器测量横截面视图的临界尺寸。 然后使用第二测量仪器测量临界尺寸。 第一和第二测量仪器的测量值相关。 然后,使用第二测量仪器,测量经由多个第二基板的凸起特征。