Semiconductor laser module with peltier module for regulating a temperature of a semiconductor laser chip
    3.
    发明授权
    Semiconductor laser module with peltier module for regulating a temperature of a semiconductor laser chip 有权
    半导体激光器模块,带有用于调节半导体激光芯片温度的珀耳帖模块

    公开(公告)号:US06697399B2

    公开(公告)日:2004-02-24

    申请号:US09864249

    申请日:2001-05-25

    IPC分类号: H01L2306

    摘要: A bottom plate (4a) of a box-shaped package (4) is made of a metal. Portions of the package (4) (peripheral wall (4b) and cover plate (4c)) other than the bottom plate (4a) are made of a resin or a ceramic that is more economical than the metal. The material cost of the package (4) can thus be reduced in comparison with the case where the package (4) is made of the metal as a whole. A Peltier module (5) is fixed to the bottom plate (4a). A base (6) is fixed over the Peltier module (5), and a semiconductor laser chip (2) is disposed on this base (6). Heat from the semiconductor laser chip (2) and from the Peltier module (5) can be efficiently radiated through the bottom plate (4a) made of the metal, and deterioration of heat radiation performance can be prevented.

    摘要翻译: 盒形包装(4)的底板(4a)由金属制成。 除了底板(4a)之外的包装件(4)(周壁(4b)和盖板(4c))的部分由比金属更经济的树脂或陶瓷制成。 与包装(4)整体由金属制成的情况相比,可以减小包装(4)的材料成本。 帕尔贴模块(5)固定在底板(4a)上。 基座(6)固定在珀耳帖模块(5)上,半导体激光芯片(2)设置在该基座(6)上。 来自半导体激光芯片(2)和珀尔贴模块(5)的热量可以有效地通过由金属制成的底板(4a)辐射,并且可以防止散热性能的劣化。

    Electric or electronic component and method of manufacturing such a component

    公开(公告)号:US06617677B2

    公开(公告)日:2003-09-09

    申请号:US09960903

    申请日:2001-09-24

    IPC分类号: H01L2306

    摘要: To provide an electric or electronic component (100) comprising a carrier substrate (10) of a semiconducting or insulating material, at least a recess (12), particularly a cavity or indentation provided in the carrier substrate (10), at least a component (14) which is inserted into the recess (12) and whose surface having at least an electrically conducting contact face (16) faces the bottom and/or wall area (18) of the recess (12) and is contacted in the bottom and/or wall area (18) of the recess (12), and at least a filling material (20) by means of which the component (14) inserted into the recess (12) is sealed particularly with the edges of the recess (12), as well as a method of manufacturing such a component, in which method, in comparison with the state of the art, larger tolerances in the position and particularly the tilt of the component (14) inserted into the recess (12) are allowed, it is proposed that at least an electrically conducting contact track (22) extending from the bottom and/or wall area (18) of the recess (12) to the surface (28) of the carrier substrate (10) is provided, and in that at least an electrically conducting connection element (24) is arranged between the respective contact face (16) of the component (14) and the respective section of the contact track (22) present in the bottom and/or wall area (18) of the recess (12), by which connection element the contact face (16) of the component (14) is connected to the section of the contact track (22) present in the bottom and/or wall area (18) of the recess (12).

    Hermetically sealing enclosure for housing photo-semiconductor devices and photo-semiconductor module incorporating the enclosure
    5.
    发明授权
    Hermetically sealing enclosure for housing photo-semiconductor devices and photo-semiconductor module incorporating the enclosure 失效
    用于外壳光电半导体器件的密封外壳和包含外壳的光电半导体模块

    公开(公告)号:US06600223B2

    公开(公告)日:2003-07-29

    申请号:US10178520

    申请日:2002-06-25

    IPC分类号: H01L2306

    摘要: A hermetically sealing enclosure for housing photo-semiconductor devices that reduces the heat generated in the wiring strips at the ceramic terminal member, increases the allowable current of the wiring strips in comparison with the conventional enclosures while maintaining the low power consumption, and stabilizes the output of the device in the enclosure. A photo-semiconductor module incorporating the enclosure is also offered. The ceramic terminal member is provided with a first wiring layer that comprises a plurality of wiring strips and that penetrates through the ceramic terminal member; two second wiring layers each of which comprises at least one wiring strip, one of which is connected to the first wiring layer at the outside of the enclosure, and the other of which is connected to the first wiring layer at the inside; and at least one third wiring layer that comprises at least one wiring strip and that connects the two second wiring layers.

    摘要翻译: 用于容纳光电半导体器件的气密密封外壳,其减少陶瓷端子构件上的布线条中产生的热量,与常规外壳相比,增加了布线条的允许电流,同时保持了低功耗,并稳定了输出 的设备。 还提供了包含外壳的光电半导体模块。 陶瓷端子构件设置有包括多个布线条并穿过陶瓷端子构件的第一布线层; 两个第二布线层,每个第二布线层包括至少一个布线条,其中一个布线条在外壳的外侧连接到第一布线层,另一布线条在内侧连接到第一布线层; 以及包括至少一个布线条并且连接所述两个第二布线层的至少一个第三布线层。

    Semiconductor opto-electronic device packaging
    6.
    发明授权
    Semiconductor opto-electronic device packaging 失效
    半导体光电器件封装

    公开(公告)号:US06407438B1

    公开(公告)日:2002-06-18

    申请号:US09070899

    申请日:1998-04-30

    IPC分类号: H01L2306

    CPC分类号: H01L31/0203 G02B6/4249

    摘要: A rear light entry photodetector array chip is secured face-down with solder on to the front face of a ceramic submount provided with electrically conductive vias. A frame-shaped mass of solder seals the chip to the submount to provide a hermetic enclosure protecting sensitive semiconductor surface areas of the photodetector chip array where electric fields are liable to be present in the vicinity of a pn or metal/semiconductor junction. The place of the photodetector array can be taken by a similar construction array of semiconductor light-emissive opto-electronic devices, such as VCSELs, or a mixed array including emitters and detectors.

    摘要翻译: 背光入射光电检测器阵列芯片正面朝下地固定在具有导电通孔的陶瓷基座的正面上。 焊接的框状焊料块将芯片密封到底座以提供密封外壳,保护光电检测器芯片阵列的敏感半导体表面区域,其中电场易于存在于pn或金属/半导体结附近。 光电检测器阵列的位置可以由诸如VCSEL之类的半导体发光光电器件的类似构造阵列,或包括发射器和检测器的混合阵列来获取。

    Packaging process and structure of electronic device
    8.
    发明授权
    Packaging process and structure of electronic device 失效
    电子设备的包装工艺和结构

    公开(公告)号:US06291882B1

    公开(公告)日:2001-09-18

    申请号:US09586523

    申请日:2000-06-02

    申请人: Yung-Sen Lin

    发明人: Yung-Sen Lin

    IPC分类号: H01L2306

    摘要: A packaging process and structure of electronic device provides first a substrate having a carrying surface and a mounting surface wherein the carrying surface is divided into a device disposing region and a device peripheral region. Then a hydrophobic Fluorine-containing layer is formed in the device peripheral region of the substrate. Subsequently, an electronic device is attached in the device disposing region and is electrically connected to the substrate. Then, a molding compound is employed to encapsulate the electronic device. The bondability between the hydrophobic Fluorine-containing layer and the molding compound is weaker than the bondability between the molding compound and the substrate. Finally, a degating process is performed to remove the excess molding compound positioned at the hydrophobic Fluorine-containing layer to accomplish the packaging process of the electronic device.

    摘要翻译: 电子装置的封装处理和结构首先提供具有承载表面和安装表面的基板,其中承载表面被分为装置设置区域和装置外围区域。 然后在衬底的器件周边区域中形成疏水性含氟层。 随后,将电子器件安装在器件设置区域中,并电连接到衬底。 然后,使用模塑料封装电子器件。 疏水性含氟层与模塑料之间的粘合性弱于模塑料和基材之间的粘合性。 最后,进行脱墨处理以除去位于疏水性含氟层的多余的模塑料,以实现电子装置的包装过程。