公开(公告)号：US07915102B2

公开(公告)日：2011-03-29

申请号：US11473455

申请日：2006-06-22

申请人： Eui-Hoon Hwang ,  Sang-Gul Lee

发明人： Eui-Hoon Hwang ,  Sang-Gul Lee

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/127

摘要： Methods of fabricating a TFT and an OLED using the same are provided. The method of fabricating a CMOS TFT includes: preparing a substrate having first and second TFT regions; forming a gate electrode on the substrate; forming a gate insulating layer on the entire surface of the substrate including the gate electrode; forming a semiconductor layer on a predetermined region of the gate insulating layer using a mask; exposing the back of the mask using the gate electrode; injecting n-type impurity ions into the semiconductor layers of the first and second TFT regions using the back-exposed mask and forming a channel region and source and drain regions; ashing both sides of the back-exposed mask; injecting low concentration impurity ions into the semiconductor layers of the first and second TFT regions using the ashed mask and forming an LDD region; and injecting p-type impurity ions into the semiconductor layer of the second TFT region and forming source and drain regions.

摘要翻译： 提供了使用其制造TFT和OLED的方法。 制造CMOS TFT的方法包括：制备具有第一和第二TFT区域的衬底; 在所述基板上形成栅电极; 在包括所述栅电极的所述基板的整个表面上形成栅极绝缘层; 使用掩模在所述栅极绝缘层的预定区域上形成半导体层; 使用栅极暴露掩模的背面; 使用反向曝光掩模将n型杂质离子注入到第一和第二TFT区域的半导体层中，并形成沟道区域和源极和漏极区域; 灰化背面裸露的两面; 使用所述灰化掩模将低浓度杂质离子注入到所述第一和第二TFT区域的半导体层中，并形成LDD区域; 并将p型杂质离子注入到第二TFT区域的半导体层中并形成源区和漏区。

公开(公告)号：US20050116305A1

公开(公告)日：2005-06-02

申请号：US10992645

申请日：2004-11-22

申请人： Eui-Hoon Hwang ,  Sang-Gul Lee ,  Deuk-Jong Kim

发明人： Eui-Hoon Hwang ,  Sang-Gul Lee ,  Deuk-Jong Kim

IPC分类号： H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L21/335 ,  H01L21/338 ,  H01L21/8232 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66757 ,  H01L29/42384 ,  H01L29/66765 ,  H01L29/78609 ,  H01L29/78675 ,  H01L29/78678

摘要： A thin film transistor according to the present invention may include a gate insulating layer; and a lower pattern placed below the gate insulating layer to contact therewith and having an edge with a taper angle of at most about 80°. With this design, dielectric strength of the gate insulating layer can be enhanced. The lower pattern can be a gate electrode layer.

摘要翻译： 根据本发明的薄膜晶体管可以包括栅极绝缘层; 以及放置在栅极绝缘层下方以与其接触并具有至多约80°的锥角的边缘的下部图案。 通过这种设计，可以提高栅极绝缘层的介电强度。 下图案可以是栅极电极层。

公开(公告)号：US06562667B1

公开(公告)日：2003-05-13

申请号：US09715188

申请日：2000-11-20

申请人： Eui-Hoon Hwang ,  Sang-Gul Lee

发明人： Eui-Hoon Hwang ,  Sang-Gul Lee

IPC分类号： H01L2100

CPC分类号： H01L29/66757 ,  H01L29/78621

摘要： An object of the present invention is to crystallize and activate the doped amorphous semiconductor layer at the same time. It is also an object to provide the TFT with good electrical connection between the source or drain electrodes and the semiconductor layer. The inventive method of fabricating TFT for a liquid crystal display device, includes forming a buffer layer on a substrate; forming an amorphous semiconductor layer on the whole buffer layer, the semiconductor layer having a channel region and source and drain ohmic contact regions, each positioned at opposing ends of the channel region; doping n+ (or p+) ions on the source and drain ohmic contact regions of the semiconductor layer while covering the channel region with a photoresist; patterning the semiconductor layer to have an island shape, the island shape including the channel region and the source and drain ohmic contact regions; irradiating laser beams on the semiconductor layer having the island shape, thereby crystallizing and activating the semiconductor layer; forming a first insulating layer on the semiconductor layer; forming a gate electrode on the first insulating layer; forming a second insulating layer on the first insulating layer while covering the gate electrode; forming source and drain contact holes penetrating both the first and second insulating layers to the source and drain ohmic contact regions of the semiconductor layer, respectively; and forming the source and drain electrodes on the second insulating layer, while the source and drain electrodes having electrical connection to the source and drain ohmic contact regions of the semiconductor layer.

摘要翻译： 本发明的目的是同时结晶和活化掺杂的非晶半导体层。 本发明的另一个目的是提供TFT在源极或漏极和半导体层之间的良好电连接。本发明制造用于液晶显示器件的TFT的方法包括在衬底上形成缓冲层; 在整个缓冲层上形成非晶半导体层，所述半导体层具有沟道区和源极和漏极欧姆接触区，每个位于沟道区的相对端; 在半导体层的源极和漏极欧姆接触区域上掺杂n +（或p +）离子，同时用光致抗蚀剂覆盖沟道区域; 将半导体层图形化为岛状，该岛状包括沟道区和源极和漏极欧姆接触区; 在具有岛状的半导体层上照射激光束，从而使半导体层结晶并起作用; 在所述半导体层上形成第一绝缘层; 在所述第一绝缘层上形成栅电极; 在覆盖所述栅电极的同时在所述第一绝缘层上形成第二绝缘层; 形成分别将所述第一和第二绝缘层穿过所述半导体层的源极和漏极欧姆接触区域的源极和漏极接触孔; 以及在所述第二绝缘层上形成所述源极和漏极，同时所述源极和漏极与所述半导体层的所述源极和漏极欧姆接触区域电连接。

公开(公告)号：US08278664B2

公开(公告)日：2012-10-02

申请号：US11473581

申请日：2006-06-22

申请人： Eui-Hoon Hwang ,  Sang-Gul Lee

发明人： Eui-Hoon Hwang ,  Sang-Gul Lee

IPC分类号： H01L29/786

CPC分类号： H01L27/3276 ,  H01L27/3244 ,  H01L51/5218 ,  H01L51/56 ,  H01L2251/5315

摘要： Provided are an organic light emitting display device (OLED) and a method of fabricating the same. When a electrically conductive line and a gate electrode are formed at the same time or when a first electrode is formed, interconnections for electrically connecting elements are formed. Thus, the number of used masks can be reduced, so that the overall fabrication process can be shortened and the production cost can be reduced.

摘要翻译： 提供了一种有机发光显示装置（OLED）及其制造方法。 当同时形成导电线和栅电极时，或者当形成第一电极时，形成用于电连接元件的互连。 因此，可以减少使用的掩模的数量，从而可以缩短整个制造过程并且可以降低生产成本。

公开(公告)号：US06682964B2

公开(公告)日：2004-01-27

申请号：US10400567

申请日：2003-03-28

申请人： Eui-Hoon Hwang ,  Sang-Gul Lee

发明人： Eui-Hoon Hwang ,  Sang-Gul Lee

IPC分类号： H01L2184

CPC分类号： H01L29/66757 ,  H01L29/78621

摘要： An object of the present invention is to crystallize and activate the doped amorphous semiconductor layer at the same time. It is also an object to provide the TFT with good electrical connection between the source or drain electrodes and the semiconductor layer. The inventive method of fabricating TFT for a liquid crystal display device, includes forming a buffer layer on a substrate; forming an amorphous semiconductor layer on the whole buffer layer, the semiconductor layer having a channel region and source and drain ohmic contact regions, each positioned at opposing ends of the channel region; doping n−(or p+) ions on the source and drain ohmic contact regions of the semiconductor layer while covering the channel region with a photoresist; patterning the semiconductor layer to have an island shape, the island shape including the channel region and the source and drain ohmic contact regions; irradiating laser beams on the semiconductor layer having the island shape, thereby crystallizing and activating the semiconductor layer; forming a first insulating layer on the semiconductor layer; forming a gate electrode on the first insulating layer; forming a second insulating layer on the first insulating layer while covering the gate electrode; forming source and drain contact holes penetrating both the first and second insulating layers to the source and drain ohmic contact regions of the semiconductor layer, respectively; and forming the source and drain electrodes on the second insulating layer, while the source and drain electrodes having electrical connection to the source and drain ohmic contact regions of the semiconductor layer.

摘要翻译： 本发明的目的是同时结晶和活化掺杂的非晶半导体层。 本发明的另一个目的是提供TFT在源极或漏极和半导体层之间的良好电连接。本发明制造用于液晶显示器件的TFT的方法包括在衬底上形成缓冲层; 在整个缓冲层上形成非晶半导体层，所述半导体层具有沟道区和源极和漏极欧姆接触区，每个位于沟道区的相对端; 在半导体层的源极和漏极欧姆接触区上掺杂n +（或p +）离子，同时用光致抗蚀剂覆盖沟道区; 将半导体层图形化为岛状，该岛状包括沟道区和源极和漏极欧姆接触区; 在具有岛状的半导体层上照射激光束，从而使半导体层结晶并起作用; 在所述半导体层上形成第一绝缘层; 在所述第一绝缘层上形成栅电极; 在覆盖所述栅电极的同时在所述第一绝缘层上形成第二绝缘层; 形成分别将所述第一和第二绝缘层穿过所述半导体层的源极和漏极欧姆接触区域的源极和漏极接触孔; 以及在所述第二绝缘层上形成所述源极和漏极，同时所述源极和漏极与所述半导体层的所述源极和漏极欧姆接触区域电连接。

公开(公告)号：US20060292763A1

公开(公告)日：2006-12-28

申请号：US11473455

申请日：2006-06-22

申请人： Eui-Hoon Hwang ,  Sang-Gul Lee

发明人： Eui-Hoon Hwang ,  Sang-Gul Lee

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/127

摘要： Methods of fabricating a TFT and an OLED using the same are provided. The method of fabricating a CMOS TFT includes: preparing a substrate having first and second TFT regions; forming a gate electrode on the substrate; forming a gate insulating layer on the entire surface of the substrate including the gate electrode; forming a semiconductor layer on a predetermined region of the gate insulating layer using a mask; exposing the back of the mask using the gate electrode; injecting n-type impurity ions into the semiconductor layers of the first and second TFT regions using the back-exposed mask and forming a channel region and source and drain regions; ashing both sides of the back-exposed mask; injecting low concentration impurity ions into the semiconductor layers of the first and second TFT regions using the ashed mask and forming an LDD region; and injecting p-type impurity ions into the semiconductor layer of the second TFT region and forming source and drain regions.

摘要翻译： 提供了使用其制造TFT和OLED的方法。 制造CMOS TFT的方法包括：制备具有第一和第二TFT区域的衬底; 在所述基板上形成栅电极; 在包括所述栅电极的所述基板的整个表面上形成栅极绝缘层; 使用掩模在所述栅极绝缘层的预定区域上形成半导体层; 使用栅极暴露掩模的背面; 使用反向曝光掩模将n型杂质离子注入到第一和第二TFT区域的半导体层中，并形成沟道区域和源极和漏极区域; 灰化背面裸露的两面; 使用所述灰化掩模将低浓度杂质离子注入到所述第一和第二TFT区域的半导体层中，并形成LDD区域; 并将p型杂质离子注入到第二TFT区域的半导体层中并形成源区和漏区。

公开(公告)号：US20060290828A1

公开(公告)日：2006-12-28

申请号：US11473581

申请日：2006-06-22

申请人： Eui-Hoon Hwang ,  Sang-Gul Lee

发明人： Eui-Hoon Hwang ,  Sang-Gul Lee

IPC分类号： G02F1/136

CPC分类号： H01L27/3276 ,  H01L27/3244 ,  H01L51/5218 ,  H01L51/56 ,  H01L2251/5315

摘要： Provided are an organic light emitting display device (OLED) and a method of fabricating the same. When a electrically conductive line and a gate electrode are formed at the same time or when a first electrode is formed, interconnections for electrically connecting elements are formed. Thus, the number of used masks can be reduced, so that the overall fabrication process can be shortened and the production cost can be reduced.

摘要翻译： 提供了一种有机发光显示装置（OLED）及其制造方法。 当同时形成导电线和栅电极时，或者当形成第一电极时，形成用于电连接元件的互连。 因此，可以减少使用的掩模的数量，从而可以缩短整个制造过程并且可以降低生产成本。

公开(公告)号：US07842563B2

公开(公告)日：2010-11-30

申请号：US11751902

申请日：2007-05-22

申请人： Jae-Bon Koo ,  Sang-Gul Lee

发明人： Jae-Bon Koo ,  Sang-Gul Lee

IPC分类号： H01L21/00

CPC分类号： H01L29/66757 ,  H01L29/4908 ,  H01L29/78621 ,  H01L29/78627

摘要： A thin film transistor may include an active layer formed on an insulating substrate and formed with source/drain regions and a channel region; a gate insulating film formed on the active layer; and a gate electrode formed on the gate insulating film. The gate electrode may be formed of a conductive metal film pattern and a conductive oxide film covering the conductive metal film pattern. The source/drain regions may include an LDD region, and the LDD region may at least partially overlap with the gate electrode.

摘要翻译： 薄膜晶体管可以包括形成在绝缘基板上并形成有源极/漏极区域和沟道区域的有源层; 形成在有源层上的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。 栅电极可以由导电金属膜图案和覆盖导电金属膜图案的导电氧化物膜形成。 源极/漏极区域可以包括LDD区域，并且LDD区域可以至少部分地与栅电极重叠。

公开(公告)号：US20050110084A1

公开(公告)日：2005-05-26

申请号：US10992131

申请日：2004-11-19

申请人： Jae-Bon Koo ,  Sang-Gul Lee

发明人： Jae-Bon Koo ,  Sang-Gul Lee

IPC分类号： H01L21/28 ,  G02F1/136 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L23/52 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L21/00 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L29/66757 ,  H01L29/4908 ,  H01L29/78621 ,  H01L29/78627

摘要： A thin film transistor may include an active layer formed on an insulating substrate and formed with source/drain regions and a channel region; a gate insulating film formed on the active layer; and a gate electrode formed on the gate insulating film. The gate electrode may be formed of a conductive metal film pattern and a conductive oxide film covering the conductive metal film pattern. The source/drain regions may include an LDD region, and the LDD region may at least partially overlap with the gate electrode.

摘要翻译： 薄膜晶体管可以包括形成在绝缘基板上并形成有源极/漏极区域和沟道区域的有源层; 形成在有源层上的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。 栅电极可以由导电金属膜图案和覆盖导电金属膜图案的导电氧化物膜形成。 源极/漏极区域可以包括LDD区域，并且LDD区域可以至少部分地与栅电极重叠。

公开(公告)号：US06570183B1

公开(公告)日：2003-05-27

申请号：US09435579

申请日：1999-11-08

申请人： Yong-In Park ,  Sang-Gul Lee ,  Jae-Beom Choi ,  Jong-Hoon Yi

发明人： Yong-In Park ,  Sang-Gul Lee ,  Jae-Beom Choi ,  Jong-Hoon Yi

IPC分类号： H01L2976

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1248 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/66765

摘要： A thin film transistor having a source/drain electrode on an insulating substrate is provided with a metal oxide layer interposed between a source/drain electrode and a metal connecting line. The formation of the metal oxide layer prevents the occurrence of the galvanic phenomenon.

摘要翻译： 在绝缘基板上具有源极/漏极的薄膜晶体管设置有介于源极/漏极和金属连接线之间的金属氧化物层。 金属氧化物层的形成防止了电偶现象的发生。