公开(公告)号：US06246353B1

公开(公告)日：2001-06-12

申请号：US09394632

申请日：1999-09-13

申请人： Michael R. Elliott ,  Frank Murden

发明人： Michael R. Elliott ,  Frank Murden

IPC分类号： H03M112

CPC分类号： H03M1/089 ,  H03F1/302 ,  H03M1/167

摘要： Integrated-circuit structures and methods are provided for generating an error signal that represents temperature and process-induced signal changes in transistor parameters. In particular, a reference transistor and a sense transistor are biased to each generate a substantially temperature-insensitive minority-carrier current. The reference transistor is provided with a substantially constant voltage across its current terminals to convert its minority-carrier current into a substantially temperature-insensitive reference current IR. In contrast, the sense transistor is provided with a temperature-varying voltage across its current terminals to convert its minority-carrier current into a temperature-varying sense current IS. The reference current and the sense current are then differenced to realize an error signal IE that contains information that describes temperature and process-induced signal errors in integrated-circuit transistor stages. The error signal is especially useful for correcting signal errors in circuits that cannot accommodate conventional signal-stabilizing circuitry because that circuitry would degrade circuit operation.

摘要翻译： 提供了集成电路结构和方法，用于产生表示晶体管参数中的温度和过程感应信号变化的误差信号。 特别地，参考晶体管和感测晶体管被偏置以产生基本上不受温度影响的少数载流子电流。 参考晶体管在其电流端子上设置有基本上恒定的电压，以将其少数载流子电流转换成基本上不受温度影响的参考电流IR。 相比之下，感测晶体管在其电流端子上设置有温度变化的电压，以将其少数载流子电流转换成温度变化的感测电流IS。 然后，参考电流和感测电流被差分化以实现包含描述集成电路晶体管级中的温度和处理引起的信号误差的信息的误差信号IE。 误差信号对于校正不能适应常规信号稳定电路的电路中的信号误差特别有用，因为该电路将降低电路操作。

公开(公告)号：US06172636B2

公开(公告)日：2001-01-09

申请号：US09352828

申请日：1999-07-13

申请人： Frank Murden ,  Michael R. Elliott

发明人： Frank Murden ,  Michael R. Elliott

IPC分类号： H03M112

CPC分类号： H03M1/445

摘要： Structures and methods are provided that linearize and stabilize the gain of adjustable-gain folding amplifiers. Accordingly, these folding amplifiers are suited for use in various compound ADCs where they improve the performance of subsequent folding amplifier stages, increase the number of allowed subsequent stages and replace the functions of other portions of compound ADCs (e.g., subranging ADCs).

摘要翻译： 提供了可调节增益折叠放大器的线性化和稳定增益的结构和方法。 因此，这些折叠放大器适用于各种复合ADC，其中它们提高随后的折叠放大器级的性能，增加允许的后续级的数量并替代复合ADC的其它部分（例如，辅助ADC）的功能。

公开(公告)号：US07652611B2

公开(公告)日：2010-01-26

申请号：US12123908

申请日：2008-05-20

申请人： Michael Elliott ,  Frank Murden

发明人： Michael Elliott ,  Frank Murden

IPC分类号： H03M1/38

CPC分类号： H03M1/1245 ,  H03M1/168

摘要： Embodiments of the present invention provide a pipeline ADC front-end sampling structure that provides a continuous time input signal to a flash comparator for sampling. By providing a continuous time input signal to the flash comparator, no delay is introduced from the need to transfer a DC charge representing the sampled input to the flash comparator. Matching sampling networks in the residual generator and the flash comparator are avoided due to the high bandwidth response requirements of the residual generator and the flash comparator when operating on high frequency input signals.

摘要翻译： 本发明的实施例提供了一种流水线ADC前端采样结构，其向闪速比较器提供连续时间输入信号以进行采样。 通过向闪存比较器提供连续的时间输入信号，从将需要将表示采样输入的DC电荷传送到闪存比较器的需要不会引入延迟。 由于冗余发生器和闪存比较器在高频输入信号上工作时的高带宽响应要求，因此避免了残留发生器和闪存比较器中的匹配采样网络。

公开(公告)号：US5684419A

公开(公告)日：1997-11-04

申请号：US347909

申请日：1994-12-01

申请人： Frank Murden ,  Carl W. Moreland

发明人： Frank Murden ,  Carl W. Moreland

IPC分类号： H03F3/26 ,  H03F3/45 ,  H03M1/44 ,  H03M1/12 ,  H03M1/46

CPC分类号： H03F3/26 ,  H03F3/45103 ,  H03F3/45107 ,  H03M1/445 ,  H03F2203/45302 ,  H03F2203/45311 ,  H03F2203/45318 ,  H03F2203/45352 ,  H03F2203/45371 ,  H03F2203/45702 ,  H03F2203/45722

摘要： A serial-type A/D converter uses magnitude amplifiers("magamps") and comparators for effecting the conversion of analog signals to Gray scale code signals that are then converted to binary digital signals by a Gray scale code-to-binary portion of the serial-type A/D converter. More specifically, a serial-type A/D converter uses an n-bit converter that has n-1 magamps and n-comparators. The n-1 magamps are cascaded such that the V.sub.OL and V.sub.OH outputs of a stage are the inputs to the next stage. The output of the comparators are input to the Gray scale code-to-binary portion of the serial A/D converter. The latching of the comparators occurs outside of the magamps. This allows for the parallel latching of the n comparators. The speed of the serial-type A/D converter is determined by the bandwidth of the magamps. The serial-type A/D converter includes an offset method that significantly reduces the effects of early voltage, V.sub.A, on the output waveforms. Each stage of the serial-type A/D converter may have any desired gain and not limited to a particular gain.

摘要翻译： 串行型A / D转换器使用幅度放大器（“magamps”）和比较器来实现将模拟信号转换为灰度代码信号，然后将其转换为二进制数字信号，通过灰度代码对二进制部分 串行型A / D转换器。 更具体地，串行型A / D转换器使用具有n-1个magamp和n比较器的n位转换器。 级联的n-1型卡子使得一级的VOL和VOH输出是下一级的输入。 比较器的输出被输入到串行A / D转换器的灰度代码到二进制部分。 比较器的锁存发生在卡盘之外。 这允许n个比较器的并联闭锁。 串行型A / D转换器的速度由卡盘的带宽决定。 串行型A / D转换器包括一种偏移方法，可显着降低早期电压VA对输出波形的影响。 串行型A / D转换器的每个级可以具有任何期望的增益，而不限于特定的增益。

公开(公告)号：US06861903B1

公开(公告)日：2005-03-01

申请号：US10650612

申请日：2003-08-27

申请人： John Kevin Behel ,  Frank Murden

发明人： John Kevin Behel ,  Frank Murden

IPC分类号： H03F1/22 ,  H03F3/21 ,  H03F1/30 ,  H03F3/68

CPC分类号： H03F3/211 ,  H03F1/22

摘要： Signal coupling systems are provided which enhance signal isolation and dynamic range with structures that increase bias voltages in upstream signal amplifiers to guard against transistor saturation that would otherwise increase current drain, reduce response time and possibly cause lock-up of an associated gain-control system. Dynamic range is thus enhanced because these systems can operate over an extended range of source signals. The increased bias voltages also decrease parasitic junction capacitances which increases input impedances and thereby enhances signal isolation and reduces signal distortion.

摘要翻译： 提供信号耦合系统，其通过增加上游信号放大器中的偏置电压的结构来增强信号隔离和动态范围，以防止晶体管饱和，否则会增加电流消耗，减少响应时间并可能导致相关增益控制系统的锁定 。 动态范围因此增强，因为这些系统可以在扩展的源信号范围内工作。 增加的偏置电压也降低了寄生结电容，这增加了输入阻抗，从而增强了信号隔离并降低了信号失真。

公开(公告)号：US06812771B1

公开(公告)日：2004-11-02

申请号：US10664717

申请日：2003-09-16

申请人： John Kevin Behel ,  Frank Murden ,  Michael Elliott ,  Joseph Michael Hensley

发明人： John Kevin Behel ,  Frank Murden ,  Michael Elliott ,  Joseph Michael Hensley

IPC分类号： G06G716

CPC分类号： H03F1/22 ,  H03F3/68 ,  H03F3/72

摘要： Digitally-controlled, variable-gain mixers and amplifiers are provided which couple transconductance cells to receive respective tap signals from a fixed attenuator that receives a first input signal. A gain interpolator provides first and second control currents with amplitudes that correspond to a segment of a control word and a multiplexer responds to another control-word segment by routing the control currents to a selected pair of adjacent transconductance cells. In response, the transconductance cells provide amplifier current signals which can also be routed to a transistor switch that mixes them with a second input signal to generate a mixer output signal whose amplitude corresponds to the control word.

摘要翻译： 提供数字控制的可变增益混频器和放大器，其耦合跨导单元以从接收第一输入信号的固定衰减器接收各自的抽头信号。 增益内插器提供具有对应于控制字段的幅度的第一和第二控制电流，并且多路器通过将控制电流路由到所选择的一对相邻跨导单元来响应于另一个控制字段。 作为响应，跨导单元提供放大器电流信号，其也可以被路由到晶体管开关，其将它们与第二输入信号混合以产生其幅度对应于控制字的混频器输出信号。

公开(公告)号：US06323791B1

公开(公告)日：2001-11-27

申请号：US09416982

申请日：1999-10-13

申请人： Frank Murden ,  Joe Young

发明人： Frank Murden ,  Joe Young

IPC分类号： H03M100

CPC分类号： H03M1/0607 ,  H03M1/167

摘要： Feedback control systems and methods are provided for correcting residue signal offset errors in subranging ADCs. The systems and methods eliminate clock-to-clock offset changes and reduce noise generation. An exemplary control system includes a feedback loop around a residue sampler and a residue amplifier that includes a) a feedback sampler that resamples the output signal of the residue sampler to produce a resampled residue signal, and b) an offset current generator that delivers an offset current to the residue amplifier with a current magnitude that is responsive to the resampled residue signal. The sampling of the residue and feedback samplers is time shifted to block the propagation of spurious signals that are typically generated in DACs of the subranging structure.

摘要翻译： 提供反馈控制系统和方法来校正子载波ADC中的残留信号偏移误差。 系统和方法消除了时钟到时钟的偏移变化并减少了噪声的产生。 示例性控制系统包括残留采样器周围的反馈回路和残余放大器，其包括：a）反馈采样器，其重新采样残留采样器的输出信号以产生再采样的残留信号，以及b）偏移电流发生器，其输出偏移 电流到残余放大器，其具有响应于再采样残留信号的电流幅度。 残留物和反馈采样器的采样被时移，以阻止通常在子结构的DAC中产生的寄生信号的传播。

公开(公告)号：US5550492A

公开(公告)日：1996-08-27

申请号：US347910

申请日：1994-12-01

申请人： Frank Murden

发明人： Frank Murden

IPC分类号： H03M1/34 ,  H03F3/26 ,  H03F3/45 ,  H03M1/44 ,  H03K5/24 ,  H03M1/72

CPC分类号： H03F3/45596 ,  H03F3/26 ,  H03F3/45085 ,  H03M1/445 ,  H03F2203/45612

摘要： A differential amplifier operating as a magnitude amplifier may be used in a serial-type A/D converter. The differential amplifier uses complementary differential emitter pairs for folding and aligning a differential input signal. The differential input signal has a first signal and a second signal each of which is fed to one of two input circuits. One input circuit includes a bipolar npn transistor and a current sink and the other includes a bipolar pnp transistor and a current source. The outputs of the input npn transistors feed a differential pair of output pnp transistors. The emitters of the output pnp transistors are coupled, with the signal on the emitters following the lower of the differential input signals. The outputs of the input pnp transistors feed a differential pair of output npn transistors. The emitters of the output npn transistors also are coupled, with the signal on the emitters following the inputs in a predetermined manner. The results are folded signals at the outputs of the output transistors that are aligned by offset circuits.

摘要翻译： 作为幅度放大器工作的差分放大器可用于串行型A / D转换器。 差分放大器使用互补差分发射器对来折叠和对准差分输入信号。 差分输入信号具有第一信号和第二信号，每个信号被馈送到两个输入电路之一。 一个输入电路包括双极性npn晶体管和电流吸收器，另一个包括双极pnp晶体管和电流源。 输入npn晶体管的输出馈送输出pnp晶体管的差分对。 输出pnp晶体管的发射极被耦合，发射极上的信号跟随差分输入信号的较低者。 输入pnp晶体管的输出馈送差分输出npn晶体管对。 输出npn晶体管的发射极也被耦合，发射器上的信号以预定的方式跟随输入。 结果是在由偏移电路对准的输出晶体管的输出处的折叠信号。