Flip-chip interconnect with increased current-carrying capability
    2.
    发明申请
    Flip-chip interconnect with increased current-carrying capability 审中-公开
    倒装芯片互连具有增加的载流能力

    公开(公告)号:US20050046024A1

    公开(公告)日:2005-03-03

    申请号:US10961446

    申请日:2004-10-08

    摘要: A metal runner that improves the current-carrying capability of solder bumps used to electrically connect a surface-mount circuit device to a substrate. The runner comprises at least one leg portion and a pad portion, with the pad portion having a continuous region and a plurality of separate electrical paths leading to and from the continuous region. The electrical paths are delineated in the pad portion by nonconductive regions defined in the pad portion, with at least some of the nonconductive regions extending into the leg portion. The multiple electrical paths split the current flow to and from the solder bump, distributing the current around the perimeter of the solder bump in a manner that reduces current density in regions of the solder bump where electromigration is most likely.

    摘要翻译: 金属流道,其提高用于将表面贴装电路器件电连接到衬底的焊料凸块的载流能力。 流道包括至少一个支腿部分和垫部分,其中该焊盘部分具有连续区域和连续区域的多个分开的电路径。 在焊盘部分中通过限定在焊盘部分中的非导电区域描绘电路径,其中至少一些非导电区域延伸到腿部。 多个电路径将电流流向和从焊料凸块分开,以在减少电子迁移最有可能的焊料凸块区域中的电流密度的方式将电流分布在焊料凸块的周边周围。