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公开(公告)号:US20080038526A1
公开(公告)日:2008-02-14
申请号:US11632719
申请日:2005-07-05
申请人: Fumitaka Kume , Tomosuke Yushida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人: Fumitaka Kume , Tomosuke Yushida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
CPC分类号: H01L21/3225 , C30B25/20 , C30B29/06 , C30B33/02 , Y10T428/24992
摘要: A silicon epitaxial wafer 100 formed by growing a silicon epitaxial layer 2 on a silicon single crystal substrate 1, produced by a CZ method, and doped with boron so that a resistivity thereof is in the range of 0.009 Ω·cm or higher and 0.012 Ω·cm or lower. The silicon single crystal substrate 1 has a density of the oxygen precipitation nuclei of 1×1010 cm−3 or higher. A width of a no-oxygen-precipitation-nucleus-forming-region 15, formed between the silicon epitaxial layer 2 and the silicon single substrate 1, is in the range of more than 0 μm and less than 10 μm. Thereby, provided is a silicon epitaxial wafer using a boron doped p+ CZ substrate, wherein a formed width of no-oxygen-precipitation-nucleus-forming-region is reduced sufficiently, and oxygen precipitates can be formed having a density sufficient enough to exert an IG effect.
摘要翻译: 通过在硅单晶衬底1上生长硅外延层2而形成的硅外延晶片100,其通过CZ方法制造并掺杂硼,使其电阻率在0.009Ω.cm以上且0.012Ω .cm或更低。 硅单晶衬底1的氧沉淀核的密度为1×10 10 -3 -3以上。 在硅外延层2和硅单基板1之间形成的无氧析出核形成区域15的宽度在大于0μm且小于10μm的范围内。 由此,提供了使用硼掺杂的P + CZ衬底的硅外延晶片,其中形成的无氧沉淀 - 核形成区域的宽度被充分降低,并且可以形成氧沉淀 具有足以施加IG效应的密度。
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公开(公告)号:US20070269338A1
公开(公告)日:2007-11-22
申请号:US11632720
申请日:2005-06-27
申请人: Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人: Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
CPC分类号: H01L21/3225 , C30B25/20 , C30B29/06 , C30B33/02 , H01L21/02381 , H01L21/02532
摘要: A silicon epitaxial wafer 100 is formed by growing a silicon epitaxial layer 2 on a silicon single crystal substrate 1, produced by means of a CZ method, and doped with boron so that a resistivity thereof is less than 0.018 Ω·cm. The silicon single crystal substrate 1 has a density of bulk stacking faults 13 in the silicon single crystal substrate 1 in the range of 1×108 cm−3 or higher and 3×109 cm−3 or lower. Thereby, provided is a silicon epitaxial wafer having a boron doped p+ CZ substrate with a resistivity of 0.018Ω·cm or lower, and a state of formation of oxygen precipitates can be adjusted adequately so as to secure a sufficient IG effect and to suppress a problem of bow and deformation of a substrate, despite that sizes of oxygen precipitates is so small to be observed accurately.
摘要翻译: 通过在Si单晶衬底1上生长硅外延层2,通过CZ法生长并掺杂硼,使其电阻率小于0.018Ω·cm,形成硅外延晶片100。 硅单晶衬底1在硅单晶衬底1中的体积堆垛层错密度为1×10 -3 -3以上且3×10 6 > 9 SUP> -3 SUP>或更低。 因此,提供具有电阻率为0.018Omega.cm以下的具有硼掺杂的P + CZ基板的硅外延晶片,并且可以适当地调节氧沉淀物的形成状态,以便确保 足够的IG效应并且抑制基板的弯曲和变形的问题,尽管氧沉淀物的尺寸如此小以被准确地观察。
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公开(公告)号:US07713851B2
公开(公告)日:2010-05-11
申请号:US11660764
申请日:2005-08-03
申请人: Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人: Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号: H01L21/20
CPC分类号: H01L21/02052 , H01L21/3225
摘要: A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 Ω·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
摘要翻译: 在由Czochralski法制造的硅单晶衬底1上以气相生长硅外延层2,并用硼掺杂以将电阻率调节至0.02&OHgr·cm或更低,氧沉淀核11形成在 硅单晶衬底1,通过在氧化气氛中在450℃至750℃进行退火,持续时间允许在硅上形成仅2nm或更小的氧化硅膜 作为退火的结果的外延层2,使用清洗液,将低温退火后的第一次清洗作为第一清洗来蚀刻所形成的氧化硅膜3。 通过该方法,氧化硅膜的最终剩余厚度可以仅被抑制到与天然氧化膜相当的水平,而不依赖于氢氟酸清洗。
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公开(公告)号:US20070243699A1
公开(公告)日:2007-10-18
申请号:US11660764
申请日:2005-08-03
申请人: Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人: Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号: H01L21/20
CPC分类号: H01L21/02052 , H01L21/3225
摘要: A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 Ω·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
摘要翻译: 在由Czochralski法制造的硅单晶衬底1上以气相生长硅外延层2,并掺杂硼以将电阻率调节至0.02Ω·cm以下,在硅中形成氧沉淀核11 单晶衬底1,通过在氧化气氛中在450℃至750℃下进行退火,持续时间允许在硅外延上形成仅2nm或更小的氧化硅膜 层2作为退火的结果,并且使用清洁溶液,在低温退火之后,将由此形成的氧化硅膜3作为第一清洗进行蚀刻。 通过该方法,氧化硅膜的最终剩余厚度可以仅被抑制到与天然氧化膜相当的水平,而不依赖于氢氟酸清洗。
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公开(公告)号:US07078357B2
公开(公告)日:2006-07-18
申请号:US10415127
申请日:2001-10-22
申请人: Satoshi Tobe , Ken Aihara
发明人: Satoshi Tobe , Ken Aihara
IPC分类号: H01L21/324
CPC分类号: H01L21/3225
摘要: There are provided a heat-treating method capable of both increasing BMD density and widening DZ layer width, and a silicon wafer having DZ layer width wider compared with a conventional one regardless of high BMD density. In the method, heat treatment (RTA treatment) is performed to a silicon wafer containing interstitial oxygen with a rapid heating-rapid cooling apparatus, thereby atomic vacancies being injected from a surface of the wafer to form a maximum position of an atomic vacancy concentration in a depth direction in the vicinity of the surface of the wafer, and thereafter heat treatment (post annealing) is performed to move the maximum position of the atomic vacancy concentration in the vicinity of the surface of the wafer into the inside of the wafer.
摘要翻译: 提供了能够增加BMD密度和扩大DZ层宽度的热处理方法,以及与常规的DZ层宽度相比宽的DZ层的硅晶片,而不管高BMD密度如何。 在该方法中,通过快速加热 - 快速冷却装置对包含间隙氧的硅晶片进行热处理(RTA处理),由此从晶片的表面注入原子空位,以形成原子空位浓度的最大位置 在晶片表面附近的深度方向,然后进行热处理(后退火),将晶片表面附近的原子空位浓度的最大位置移动到晶片内部。
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公开(公告)号:US20060121291A1
公开(公告)日:2006-06-08
申请号:US11265129
申请日:2005-11-03
IPC分类号: B32B13/04 , H01L21/324
CPC分类号: H01L21/3225
摘要: There are provided a heat-treating method capable of suppressing generation of slip in a CZ silicon single crystal wafer having a diameter of mainly 300 mm or more even under high temperature heat treatment to annihilate grown-in defects in the vicinity of a surface of the wafer, and an annealed wafer having a DZ layer in a surface layer of the wafer and oxide precipitates in the bulk thereof at a high density which exert a high gettering effect. First heat treatment of a silicon single crystal wafer manufactured from a silicon single crystal ingot pulled by means of a Czochralski method is performed at a temperature in the range of 600 to 1100° C. to form oxide precipitates in the bulk of the wafer, and thereafter, second heat treatment is performed at a temperature in the range of 1150 to 1300° C.
摘要翻译: 提供了即使在高温热处理下也能够抑制直径为300mm以上的CZ硅单晶晶片中的滑动产生的热处理方法,以消除在表面附近的生长缺陷 晶片,并且在晶片的表面层中具有DZ层的退火晶片,其氧化物以其高密度析出,其发挥高吸杂效应。 在由600℃〜1100℃的温度范围内进行利用切克劳斯基法(Czochralski method)拉伸的硅单晶锭制造的硅单晶晶片的第一次热处理,以在晶片本体中形成氧化物析出物, 此后,在1150〜1300℃的温度下进行第二次热处理。
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公开(公告)号:US08043871B2
公开(公告)日:2011-10-25
申请号:US12921492
申请日:2009-03-24
申请人: Tsuyoshi Ohtsuki , Satoshi Tobe , Yasushi Mizusawa
发明人: Tsuyoshi Ohtsuki , Satoshi Tobe , Yasushi Mizusawa
IPC分类号: H01L21/66
CPC分类号: H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L22/12 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要: The present invention provides a method for forming an oxide film on a silicon wafer, comprising: measuring surface roughness of the silicon wafer and/or crystallinity in a surface layer portion of the silicon wafer in advance; adjusting oxidizing conditions for the silicon wafer based on the measurement value; and forming the oxide film on the silicon wafer under the adjusted oxidizing conditions. As a result, there can be provided the method for forming an oxide film by which the oxidizing conditions can be adjusted based on a state of the surface and/or the surface layer of the silicon wafer before forming the oxide film and even an ultrathin oxide film can be thereby accurately formed.
摘要翻译: 本发明提供一种在硅晶片上形成氧化膜的方法,包括:预先测量硅晶片的表面层部分中的硅晶片的表面粗糙度和/或结晶度; 基于测量值调整硅晶片的氧化条件; 以及在调整好的氧化条件下在硅晶片上形成氧化膜。 结果,可以提供形成氧化膜的方法,其可以在形成氧化膜之前甚至基于硅晶片的表面和/或表面层的状态以及甚至超薄氧化物来调节氧化条件 因此可以精确地形成膜。
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公开(公告)号:US07081422B2
公开(公告)日:2006-07-25
申请号:US10220145
申请日:2001-12-11
CPC分类号: H01L21/3225
摘要: There are provided a heat-treating method capable of suppressing generation of slip in a CZ silicon single crystal wafer having a diameter of mainly 300 mm or more even under high temperature heat treatment to annihilate grown-in defects in the vicinity of a surface of the wafer, and an annealed wafer having a DZ layer in a surface layer of the wafer and oxide precipitates in the bulk thereof at a high density which exert a high gettering effect. First heat treatment of a silicon single crystal wafer manufactured from a silicon single crystal ingot pulled by means of a Czochralski method is performed at a temperature in the range of 600 to 1100° C. to form oxide precipitates in the bulk of the wafer, and thereafter, second heat treatment is performed at a temperature in the range of 1150 to 1300° C.
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公开(公告)号:US08728870B2
公开(公告)日:2014-05-20
申请号:US12664232
申请日:2008-06-04
申请人: Satoshi Tobe , Takao Takenaka
发明人: Satoshi Tobe , Takao Takenaka
IPC分类号: H01L25/065
CPC分类号: H01L21/3226 , H01L21/187
摘要: Provided are a thin film silicon wafer having high gettering capability, a manufacturing method therefor, a multi-layered silicon wafer formed by laminating the thin film silicon wafers, and a manufacturing method therefor. The thin film silicon wafer is manufactured by: forming one or more gettering layers immediately below a device layer which is formed in a vicinity of a front surface of a semiconductor silicon wafer; fabricating a device in the device layer of the semiconductor silicon wafer; and after the device has been fabricated, removing part of the semiconductor silicon wafer from a rear surface thereof to immediately below the gettering layers so as to leave at least one of the gettering layers in place. As a result, the thin film silicon wafer is allowed to have gettering capability even after having been reduced in thickness to be in a thin film form.
摘要翻译: 提供一种具有高吸气能力的薄膜硅晶片及其制造方法及其制造方法。 薄膜硅晶片通过以下方式制造:在形成于半导体硅晶片的前表面附近的器件层的正下方形成一个或多个吸杂层; 在半导体硅晶片的器件层中制造器件; 并且在器件制造之后,将半导体硅晶片的一部分从其后表面移除到吸气层的正下方,以便将至少一个吸气层留在适当位置。 结果,薄膜硅晶片即使在厚度减小到薄膜形式之后也具有吸气能力。
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公开(公告)号:US20110033958A1
公开(公告)日:2011-02-10
申请号:US12921492
申请日:2009-03-24
申请人: Tsuyoshi Ohtsuki , Satoshi Tobe , Yasushi Mizusawa
发明人: Tsuyoshi Ohtsuki , Satoshi Tobe , Yasushi Mizusawa
IPC分类号: H01L21/66
CPC分类号: H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L22/12 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要: The present invention provides a method for forming an oxide film on a silicon wafer, comprising: measuring surface roughness of the silicon wafer and/or crystallinity in a surface layer portion of the silicon wafer in advance; adjusting oxidizing conditions for the silicon wafer based on the measurement value; and forming the oxide film on the silicon wafer under the adjusted oxidizing conditions. As a result, there can be provided the method for forming an oxide film by which the oxidizing conditions can be adjusted based on a state of the surface and/or the surface layer of the silicon wafer before forming the oxide film and even an ultrathin oxide film can be thereby accurately formed.
摘要翻译: 本发明提供一种在硅晶片上形成氧化膜的方法,包括:预先测量硅晶片的表面层部分中的硅晶片的表面粗糙度和/或结晶度; 基于测量值调整硅晶片的氧化条件; 以及在调整好的氧化条件下在硅晶片上形成氧化膜。 结果,可以提供形成氧化膜的方法,其可以在形成氧化膜之前甚至基于硅晶片的表面和/或表面层的状态以及甚至超薄氧化物来调节氧化条件 因此可以精确地形成膜。
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