公开(公告)号：US20160163826A1

公开(公告)日：2016-06-09

申请号：US14564323

申请日：2014-12-09

Applicant: GLOBALFOUNDRIES INC.

Inventor： Kangguo CHENG ,  Ali KHAKIFIROOZ ,  Alexander REZNICEK ,  Dominic J. SCHEPIS

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/04 ,  H01L29/78

CPC classification number: H01L21/845 ,  H01L21/823431 ,  H01L21/823821 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785

Abstract: A method including forming fin spacers on opposite sidewalls of a semiconductor fin made from a semiconductor substrate, forming a dielectric layer in direct contact with the fin spacers such that a top surface of the fin and a top surface of the fin spacers remain exposed, recessing a portion of the fin between the fin spacers, removing the fin spacers to create an opening, and epitaxially growing an unmerged source drain region in the opening, where lateral growth of the unmerged source drain region is constrained on opposite sides by the dielectric layer.

Abstract translation: 一种方法，包括在由半导体衬底制成的半导体鳍片的相对侧壁上形成翅片间隔件，形成与翅片间隔件直接接触的电介质层，使得翅片的顶表面和翅片间隔件的顶表面保持暴露，凹陷 翅片间隔件的一部分，去除翅片间隔件以形成开口，并且在开口中外延生长未熔化的源极漏极区域，其中未熔化的源极漏极区域的横向生长通过电介质层约束在相对的两侧。

公开(公告)号：US20160064523A1

公开(公告)日：2016-03-03

申请号：US14937029

申请日：2015-11-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Thomas N. ADAM ,  Kangguo CHENG ,  Ali KHAKIFIROOZ ,  Jinghong LI ,  Alexander REZNICEK

IPC: H01L29/66 ,  H01L29/08 ,  H01L21/02

CPC classification number: H01L29/66636 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/84 ,  H01L29/0657 ,  H01L29/0847 ,  H01L29/78

Abstract: A semiconductor structure including a semiconductor wafer. The semiconductor wafer includes a gate structure, a first trench in the semiconductor wafer adjacent to a first side of the gate structure and a second trench adjacent to a second side of the gate structure, the first and second trenches filled with a doped epitaxial silicon to form a source in the filled first trench and a drain in the filled second trench such that each of the source and drain are recessed and have an inverted facet. In a preferred exemplary embodiment, the epitaxial silicon is doped with boron.

公开(公告)号：US20140353734A1

公开(公告)日：2014-12-04

申请号：US13909328

申请日：2013-06-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES Inc.

Inventor： Ruilong XIE ,  Xiuyu CAI ,  Vimal KAMINENI ,  Kangguo CHENG ,  Ali KHAKIFIROOZ

IPC: H01L21/28 ,  H01L29/417 ,  H01L29/423 ,  H01L21/283

CPC classification number: H01L29/42376 ,  H01L21/28088 ,  H01L21/28114 ,  H01L21/283 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76885 ,  H01L21/76897 ,  H01L21/823425 ,  H01L21/823475 ,  H01L23/485 ,  H01L23/53266 ,  H01L29/41775 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66628 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor structures with reduced gate and/or contact resistances and fabrication methods are provided. The method includes: providing a semiconductor device, which includes forming a transistor of the semiconductor device, where the transistor forming includes: forming a T-shaped gate for the transistor, the T-shaped gate being T-shaped in elevational cross-section; and forming an inverted-T-shaped contact to an active region of the transistor, the inverted-T-shaped contact including a conductive structure with an inverted T-shape in elevational cross-section.

Abstract translation: 提供具有减小的栅极和/或接触电阻的半导体结构和制造方法。 该方法包括：提供半导体器件，其包括形成半导体器件的晶体管，其中晶体管形成包括：形成用于晶体管的T形栅极，T形栅极呈垂直截面为T形; 并且在晶体管的有源区域形成倒T形的接触，所述倒T形接触件包括在横截面上具有倒T形的导电结构。