公开(公告)号：US09263541B2

公开(公告)日：2016-02-16

申请号：US14261559

申请日：2014-04-25

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shariq Siddiqui ,  Bhagawan Sahu ,  Rohit Galatage ,  Hoon Kim

IPC: H01L21/00 ,  H01L21/16 ,  H01L29/51 ,  H01L21/02

CPC classification number: H01L29/513 ,  H01L21/28255 ,  H01L29/517

Abstract: Embodiments of the present invention provide a high-K dielectric film for use with silicon germanium (SiGe) or germanium channel materials, and methods of fabrication. As a first step of this process, an interfacial layer (IL) is formed on the semiconductor substrate providing reduced interface trap density. However, an ultra-thin layer is used as a barrier film to avoid germanium diffusion in high-k film and oxygen diffusion from the high-k film to the interfacial layer (IL), therefore, dielectric films such as aluminum oxide (Al2O3), zirconium oxide, or lanthanum oxide (La2O3) may be used. In addition, these films can provide high thermal budget. A second dielectric layer is then deposited on the first dielectric layer. The second dielectric layer is a high-k dielectric layer, providing a reduced effective oxide thickness (EOT), resulting in improved device performance.

Abstract translation: 本发明的实施方案提供了用于硅锗（SiGe）或锗通道材料的高K电介质膜及其制造方法。 作为该方法的第一步，在半导体衬底上形成界面层（IL），提供降低的界面陷阱密度。 然而，使用超薄层作为阻挡膜，以避免高k膜中的锗扩散和从高k膜到界面层（IL）的氧扩散，因此，诸如氧化铝（Al 2 O 3）的介电膜， ，氧化锆或氧化镧（La 2 O 3）。 此外，这些电影可以提供高热预算。 然后在第一介电层上沉积第二介电层。 第二电介质层是高k电介质层，提供有效的氧化物厚度（EOT）降低，从而提高器件性能。

公开(公告)号：US20160133716A1

公开(公告)日：2016-05-12

申请号：US14995956

申请日：2016-01-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： Shariq Siddiqui ,  Bhagawan Sahu ,  Rohit Galatage ,  Hoon Kim

IPC: H01L29/51

CPC classification number: H01L29/513 ,  H01L21/28255 ,  H01L29/517

Abstract: Embodiments of the present invention provide a high-K dielectric film for use with silicon germanium (SiGe) or germanium channel materials, and methods of fabrication. As a first step of this process, an interfacial layer (IL) is formed on the semiconductor substrate providing reduced interface trap density. However, an ultra-thin layer is used as a barrier film to avoid germanium diffusion in high-k film and oxygen diffusion from the high-k film to the interfacial layer (IL), therefore, dielectric films such as aluminum oxide (Al2O3), zirconium oxide, or lanthanum oxide (La2O3) may be used. In addition, these films can provide high thermal budget. A second dielectric layer is then deposited on the first dielectric layer. The second dielectric layer is a high-k dielectric layer, providing a reduced effective oxide thickness (EOT), resulting in improved device performance.

公开(公告)号：US20150311308A1

公开(公告)日：2015-10-29

申请号：US14261559

申请日：2014-04-25

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shariq Siddiqui ,  Bhagawan Sahu ,  Rohit Galatage ,  Hoon Kim

IPC: H01L29/51 ,  H01L21/02

CPC classification number: H01L29/513 ,  H01L21/28255 ,  H01L29/517

Abstract: Embodiments of the present invention provide a high-K dielectric film for use with silicon germanium (SiGe) or germanium channel materials, and methods of fabrication. As a first step of this process, an interfacial layer (IL) is formed on the semiconductor substrate providing reduced interface trap density. However, an ultra-thin layer is used as a barrier film to avoid germanium diffusion in high-k film and oxygen diffusion from the high-k film to the interfacial layer (IL), therefore, dielectric films such as aluminum oxide (Al2O3), zirconium oxide, or lanthanum oxide (La2O3) may be used. In addition, these films can provide high thermal budget. A second dielectric layer is then deposited on the first dielectric layer. The second dielectric layer is a high-k dielectric layer, providing a reduced effective oxide thickness (EOT), resulting in improved device performance.

Abstract translation: 本发明的实施方案提供了用于硅锗（SiGe）或锗通道材料的高K电介质膜及其制造方法。 作为该方法的第一步，在半导体衬底上形成界面层（IL），提供降低的界面陷阱密度。 然而，使用超薄层作为阻挡膜，以避免高k膜中的锗扩散和从高k膜到界面层（IL）的氧扩散，因此，诸如氧化铝（Al 2 O 3）的介电膜， ，氧化锆或氧化镧（La 2 O 3）。 此外，这些电影可以提供高热预算。 然后在第一介电层上沉积第二介电层。 第二电介质层是高k电介质层，提供有效的氧化物厚度（EOT）降低，从而提高器件性能。

公开(公告)号：US20160056033A1

公开(公告)日：2016-02-25

申请号：US14830131

申请日：2015-08-19

Applicant: The Regents of the University of California ,  GLOBALFOUNDRIES, Inc. ,  Applied Materials, Inc.

Inventor： Kasra Sardashti ,  Tobin Kaufman-Osborn ,  Tyler Kent ,  Andrew Kummel ,  Shariq Siddiqui ,  Bhagawan Sahu ,  Adam Brand ,  Naomi Yoshida

IPC: H01L21/02

CPC classification number: H01L21/0228 ,  H01L21/0206 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02301 ,  H01L21/02315 ,  H01L21/306 ,  H01L29/66181 ,  H01L29/94

Abstract: Surface pretreatment of SiGe or Ge surfaces prior to gate oxide deposition cleans the SiGe or Ge surface to provide a hydrogen terminated surface or a sulfur passivated (or S—H) surface. Atomic layer deposition (ALD) of a high-dielectric-constant oxide at a low temperature is conducted in the range of 25-200° C. to form an oxide layer. Annealing is conducted at an elevated temperature. A method for oxide deposition on a damage sensitive III_V semiconductor surface conducts in-situ cleaning of the surface with cyclic pulsing of hydrogen and TMA (trimethyl aluminum) at a low temperature in the range of 100-200° C. Atomic layer deposition (ALD) of a high-dielectric-constant oxide forms an oxide layer. Annealing is conducted at an elevated temperature. The annealing can create a silicon terminated interfaces.

Abstract translation: 在栅极氧化物沉积之前对SiGe或Ge表面的表面预处理清洁SiGe或Ge表面以提供氢封端表面或硫钝化（或S-H）表面。 在25-200℃的范围内进行低温下的高介电常数氧化物的原子层沉积（ALD），形成氧化物层。 退火在升高的温度下进行。 在损伤敏感的III_V半导体表面上的氧化物沉积的方法在100-200℃的低温下用氢和TMA（三甲基铝）的循环脉冲进行表面的原位清洗。原子层沉积（ALD ）的高介电常数氧化物形成氧化物层。 退火在升高的温度下进行。 退火可以产生硅封端的界面。

公开(公告)号：US10134585B2

公开(公告)日：2018-11-20

申请号：US14830131

申请日：2015-08-19

Applicant: The Regents of the University of California ,  GLOBALFOUNDRIES, Inc. ,  Applied Materials, Inc.

Inventor： Kasra Sardashti ,  Tobin Kaufman-Osborn ,  Tyler Kent ,  Andrew Kummel ,  Shariq Siddiqui ,  Bhagawan Sahu ,  Adam Brand ,  Naomi Yoshida

IPC: H01L21/02 ,  H01L29/66 ,  H01L21/306 ,  H01L29/94

Abstract: Surface pretreatment of SiGe or Ge surfaces prior to gate oxide deposition cleans the SiGe or Ge surface to provide a hydrogen terminated surface or a sulfur passivated (or S—H) surface. Atomic layer deposition (ALD) of a high-dielectric-constant oxide at a low temperature is conducted in the range of 25-200° C. to form an oxide layer. Annealing is conducted at an elevated temperature. A method for oxide deposition on a damage sensitive III-V semiconductor surface conducts in-situ cleaning of the surface with cyclic pulsing of hydrogen and TMA (trimethyl aluminum) at a low temperature in the range of 100-200° C. Atomic layer deposition (ALD) of a high-dielectric-constant oxide forms an oxide layer. Annealing is conducted at an elevated temperature. The annealing can create a silicon terminated interfaces.

公开(公告)号：US20150162435A1

公开(公告)日：2015-06-11

申请号：US14100196

申请日：2013-12-09

Applicant: GLOBALFOUNDRIES INC.

Inventor： Bhagawan Sahu ,  Zoran Krivokapic

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/06

CPC classification number: H01L29/785 ,  H01L29/165 ,  H01L29/66795

Abstract: Approaches for providing asymmetrical channel growth of a cladding layer over fins of a fin field effect transistor (FinFET) device are disclosed. Specifically, in one approach, a FinFET device comprises a set of fins formed from a substrate, a shallow trench isolation layer formed adjacent each of the set of fins, and a cladding layer (e.g., silicon germanium) formed over each of the set of fins, wherein a thickness of the cladding layer atop each of the set of fins is greater than a thickness of the cladding layer along each sidewall of the set of fins. In one embodiment, the thickness of the cladding layer atop the set of fins is approximately two times (2×) greater than the thickness of the cladding layer along each sidewall of the set of fins.

Abstract translation: 公开了一种用于在翅片场效应晶体管（FinFET）器件的鳍片上提供包覆层的不对称沟道生长的方法。 具体地说，在一种方法中，FinFET器件包括由衬底形成的一组翅片，与该组翅片相邻形成的浅沟槽隔离层，以及形成在该组翅片之上的覆层（例如，硅锗） 翅片，其中在所述一组翅片中的每一个上方的所述包覆层的厚度大于所述一组翅片的每个侧壁处的所述包覆层的厚度。 在一个实施例中，覆盖层顶部的散热片的厚度比沿着该组散热片的每个侧壁的包覆层的厚度大大约两倍（2×）。

公开(公告)号：US20140312434A1

公开(公告)日：2014-10-23

申请号：US14328275

申请日：2014-07-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zoran Krivokapic ,  Bhagawan Sahu

IPC: H01L29/51 ,  H01L29/78

CPC classification number: H01L29/51 ,  H01L21/02527 ,  H01L21/0262 ,  H01L21/02628 ,  H01L21/02664 ,  H01L29/4966 ,  H01L29/785

Abstract: One illustrative device disclosed herein includes at least one fin comprised of a semiconducting material, a layer of gate insulation material positioned adjacent an outer surface of the fin, a gate electrode comprised of graphene positioned on the layer of gate insulation material around at least a portion of the fin, and an insulating material formed on the gate electrode.