公开(公告)号：US10078183B2

公开(公告)日：2018-09-18

申请号：US14966781

申请日：2015-12-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Shawn A. Adderly ,  Samantha D. DiStefano ,  Jeffrey P. Gambino ,  Prakash Periasamy ,  Donald R. Letourneau

IPC: G02B6/13 ,  G02B6/12 ,  G02B6/30 ,  G02B6/136 ,  G02B6/122

CPC classification number: G02B6/30 ,  G02B6/122 ,  G02B6/13 ,  G02B6/136 ,  G02B6/4243 ,  G02B6/4274

Abstract: The disclosure relates to semiconductor structures and, more particularly, to waveguide structures used in phonotics chip packaging and methods of manufacture. The structure includes: a first die comprising photonics functions including a waveguide structure; a second die bonded to the first die and comprising CMOS logic functions; and an optical fiber optically coupled to the waveguide structure and positioned within a cavity formed in the second die.

公开(公告)号：US20170168242A1

公开(公告)日：2017-06-15

申请号：US14966781

申请日：2015-12-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Shawn A. Adderly ,  Samantha D. DiStefano ,  Jeffrey P. Gambino ,  Prakash Periasamy ,  Donald R. Letourneau

IPC: G02B6/30 ,  G02B6/122 ,  G02B6/13 ,  G02B6/136

CPC classification number: G02B6/30 ,  G02B6/122 ,  G02B6/13 ,  G02B6/136

Abstract: The disclosure relates to semiconductor structures and, more particularly, to waveguide structures used in phonotics chip packaging and methods of manufacture. The structure includes: a first die comprising photonics functions including a waveguide structure; a second die bonded to the first die and comprising CMOS logic functions; and an optical fiber optically coupled to the waveguide structure and positioned within a cavity formed in the second die.

公开(公告)号：US09553061B1

公开(公告)日：2017-01-24

申请号：US14946208

申请日：2015-11-19

Applicant: GLOBALFOUNDRIES INC.

Inventor： Donald R. Letourneau ,  Patrick S. Spinney ,  Leah J. Bagley ,  John M. Sutton

IPC: H01L23/00 ,  H01L21/66 ,  H01L21/311

CPC classification number: H01L24/06 ,  H01L21/311 ,  H01L22/32 ,  H01L22/34 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03618 ,  H01L2224/03622 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06515 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/03831

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to wire bond pad structures and methods of manufacture. The structure includes: bond pads in an active region of a chip; test pad structures in a kerf region of the chip; and hardmask material in the kerf region between the test pad structures and the bond pads. The surfaces of the test pad structures and the bond pads are devoid of the hardmask material.

Abstract translation: 本公开涉及半导体结构，更具体地，涉及引线键合焊盘结构和制造方法。 该结构包括：芯片的有源区中的接合焊盘; 在芯片的切口区域中的测试焊盘结构; 以及在测试焊盘结构和接合焊盘之间的切口区域中的硬掩模材料。 测试焊盘结构和接合焊盘的表面没有硬掩模材料。