公开(公告)号：US09214436B2

公开(公告)日：2015-12-15

申请号：US14172323

申请日：2014-02-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tanya Andreeva Atanasova ,  Reiner Willeke ,  Anh Ngoc Duong

IPC: H01L21/44 ,  H01L23/00

CPC classification number: H01L24/05 ,  C23F1/18 ,  C23F1/26 ,  C23F1/44 ,  H01L21/32134 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/0381 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11614 ,  H01L2224/1181 ,  H01L2224/11831 ,  H01L2224/13016 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2924/0531 ,  H01L2924/0549 ,  H01L2924/20102 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2924/00014 ,  H01L2224/03462 ,  H01L2924/01047

Abstract: Methods for wet etching a UBM layer and the resulting devices are disclosed. Embodiments may include patterning metal bumps on a wafer that has at least two metal layers thereon; exposing the wafer to a first acid solution to remove a portion of a first of the two metal layers exposed by the patterning of the metal bumps; and exposing the wafer to a second acid solution to remove a portion a second of the two metal layers exposed by the patterning of the metal bumps and the exposure of the wafer to the first acid solution, wherein an undercut below the metal bumps, formed by removal of the portions of the first and second metal layers, is less than 1.5 microns.

Abstract translation: 公开了用于湿法蚀刻UBM层和所得到的器件的方法。 实施例可以包括在其上具有至少两个金属层的晶片上图案化金属凸块; 将晶片暴露于第一酸溶液以除去通过金属凸块的图案化暴露的两个金属层中的第一个金属层的第一部分; 以及将所述晶片暴露于第二酸溶液以除去通过所述金属凸块的图案化而露出的所述两个金属层中的一部分的一部分，以及所述晶片暴露于所述第一酸溶液，其中在所述金属凸块下方形成底切， 去除第一和第二金属层的部分小于1.5微米。

公开(公告)号：US10712499B2

公开(公告)日：2020-07-14

申请号：US16202037

申请日：2018-11-27

Applicant: GLOBALFOUNDRIES INC.

Inventor： Selaka Bandara Bulumulla ,  Md Sayed Kaysar Bin Rahim ,  Tanya Andreeva Atanasova

IPC: G02B6/12 ,  H01L23/00 ,  G02B6/122 ,  H01L23/522 ,  H01L23/64 ,  H01L49/02 ,  G02B6/13

Abstract: The present disclosure relates to packaging of integrated circuit chips for semiconductor devices. More particularly, the present disclosure relates to packaging of multiple chips for silicon photonics devices. The present disclosure provides a semiconductor device including a photonic integrated circuit (PIC) chip, an inductor positioned over the PIC chip, and a transimpedance amplifier (TIA) chip positioned over the PIC chip. The inductor has a first terminal end and a second terminal end, and the first terminal end is connected to the PIC chip.