公开(公告)号：US09129987B2

公开(公告)日：2015-09-08

申请号：US14163687

申请日：2014-01-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jing Wan ,  Jin Ping Liu ,  Guillaume Bouche ,  Andy Wei ,  Lakshmanan H. Vanamurthy ,  Cuiqin Xu ,  Sridhar Kuchibhatla ,  Rama Kambhampati ,  Xiuyu Cai

IPC: H01L29/66 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/28

CPC classification number: H01L29/66545 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/31055 ,  H01L21/31111 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/7848

Abstract: A method includes providing a gate structure having a gate, a first spacer along at least one side of the gate and an interlayer dielectric on at least one of the gate and the first spacer. The interlayer dielectric is removed to reveal the first spacer. The first spacer is removed and a second spacer is deposited on at least one side of the gate. The second spacer is formed of material having a lower dielectric constant than the first spacer.

Abstract translation: 一种方法包括提供具有栅极的栅极结构，沿栅极的至少一侧的第一间隔物，以及至少一个栅极和第一间隔物上的层间电介质。 去除层间电介质以露出第一间隔物。 去除第一间隔物并且在栅极的至少一侧上沉积第二间隔物。 第二间隔物由具有比第一间隔物低的介电常数的材料形成。