公开(公告)号：US20150179766A1

公开(公告)日：2015-06-25

申请号：US14135716

申请日：2013-12-20

Applicant: GLOBALFOUNDRIES INC. ,  International Business Machines Corporations

Inventor： Hui ZANG ,  Chun-chen YEH ,  Tenko YAMASHITA ,  Veeraraghavan BASKER

IPC: H01L29/66 ,  H01L21/306 ,  H01L21/02 ,  H01L29/78 ,  H01L29/417

CPC classification number: H01L29/66795 ,  H01L21/30604 ,  H01L29/41791 ,  H01L29/785

Abstract: A method for fabricating a finfet with a buried local interconnect and the resulting device are disclosed. Embodiments include forming a silicon fin on a BOX layer, forming a gate electrode perpendicular to the silicon fin over a portion of the silicon fin, forming a spacer on each of opposite sides of the gate electrode, forming source/drain regions on the silicon fin at opposite sides of the gate electrode, recessing the BOX layer, undercutting the silicon fin and source/drain regions, at opposite sides of the gate electrode, and forming a local interconnect on a recessed portion of the BOX layer.

Abstract translation: 公开了一种用于制造具有埋入局部互连的鳍片的方法，以及所得到的器件。 实施例包括在BOX层上形成硅翅片，在硅鳍片的一部分上形成垂直于硅鳍片的栅电极，在栅电极的每个相对侧上形成间隔物，在硅片上形成源极/漏极区域 在栅电极的相对侧，使BOX层凹陷，在栅电极的相对侧处切割硅鳍和源极/漏极区，并在BOX层的凹陷部分上形成局部互连。

公开(公告)号：US20180090598A1

公开(公告)日：2018-03-29

申请号：US15280451

申请日：2016-09-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong XIE ,  Tenko YAMASHITA ,  Kangguo CHENG ,  Chun-Chen YEH

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L29/78 ,  H01L29/417 ,  H01L21/033 ,  H01L27/088

CPC classification number: H01L29/66666 ,  H01L21/0332 ,  H01L21/0337 ,  H01L27/088 ,  H01L29/0847 ,  H01L29/41741 ,  H01L29/66545 ,  H01L29/7827

Abstract: A semiconductor structure includes a semiconductor substrate, a bottom source/drain layer for a first vertical transistor over the semiconductor substrate, a vertical channel over the source/drain layer, and a metal gate wrapped around the vertical channel, the vertical channel having a fixed height relative to the metal gate at an interface therebetween. The semiconductor structure further includes a top source/drain layer over the vertical channel, and a self-aligned contact to each of the top and bottom source/drain layer and the gate. The semiconductor structure can be realized by providing a semiconductor substrate with a bottom source/drain layer thereover, forming a vertical channel over the bottom source/drain layer, forming a dummy gate wrapped around the vertical channel, and forming a bottom spacer layer and a top spacer layer around a top portion and a bottom portion, respectively, of the vertical channel, a remaining center portion of the vertical channel defining a fixed vertical channel height. The method further includes forming a top source/drain layer over the vertical channel, replacing the dummy gate with a metal gate, and forming self-aligned source, drain and gate contacts.