公开(公告)号：US09583569B2

公开(公告)日：2017-02-28

申请号：US14968286

申请日：2015-12-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Renata Camillo-Castillo ,  David L. Harame ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater

IPC: H01L29/73 ,  H01L29/08 ,  H01L29/732 ,  H01L29/66 ,  H01L21/3105 ,  H01L29/737 ,  H01L29/10

CPC classification number: H01L29/0826 ,  H01L21/31056 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7325 ,  H01L29/7378

Abstract: Device structures for a bipolar junction transistor. A layer is formed on a top surface of a substrate. A trench is formed in the layer and has a plurality of sidewalls with a width between an opposite pair of the sidewalls that varies with increasing distance from the top surface of the substrate. A collector pedestal of the bipolar junction transistor is formed in the trench.

Abstract translation: 双极结型晶体管的器件结构。 在衬底的顶表面上形成一层。 在该层中形成沟槽并且具有多个侧壁，其宽度在相对的一对侧壁之间的宽度随着距离衬底顶表面的距离的增加而变化。 在沟槽中形成双极结型晶体管的集电极基座。

公开(公告)号：US20160087073A1

公开(公告)日：2016-03-24

申请号：US14958345

申请日：2015-12-03

Applicant: GLOBALFOUNDRIES Inc

Inventor： Renata Camillo-Castillo ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater ,  Anthony K. Stamper

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/66242 ,  H01L29/0649 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/7378

Abstract: Device structures, fabrication methods, and design structures for a bipolar junction transistor. A trench isolation region is formed in a substrate. The trench isolation region is coextensive with a collector in the substrate. A base layer is formed on the collector and on a first portion of the trench isolation region. A dielectric layer is formed on the base layer and on a second portion of the trench isolation region peripheral to the base layer. After the dielectric layer is formed, the trench isolation region is at least partially removed to define an air gap beneath the dielectric layer and the base layer.

公开(公告)号：US09231074B2

公开(公告)日：2016-01-05

申请号：US13946379

申请日：2013-07-19

Applicant: GLOBALFOUNDRIES INC.

Inventor： Renata Camillo-Castillo ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater ,  Anthony K. Stamper

IPC: H01L29/732 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/66242 ,  H01L29/0649 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/7378

Abstract: Device structures, fabrication methods, and design structures for a bipolar junction transistor. A trench isolation region is formed in a substrate. The trench isolation region is coextensive with a collector in the substrate. A base layer is formed on the collector and on a first portion of the trench isolation region. A dielectric layer is formed on the base layer and on a second portion of the trench isolation region peripheral to the base layer. After the dielectric layer is formed, the trench isolation region is at least partially removed to define an air gap beneath the dielectric layer and the base layer.

Abstract translation: 双极结型晶体管的器件结构，制造方法和设计结构。 在衬底中形成沟槽隔离区。 沟槽隔离区域与衬底中的集电极共同延伸。 基底层形成在集电器和沟槽隔离区的第一部分上。 电介质层形成在基底层上和在基底层周边的沟槽隔离区域的第二部分上。 在形成电介质层之后，至少部分去除沟槽隔离区域以在电介质层和基底层下方形成气隙。

公开(公告)号：US09653566B2

公开(公告)日：2017-05-16

申请号：US14958345

申请日：2015-12-03

Applicant: GLOBALFOUNDRIES Inc

Inventor： Renata Camillo-Castillo ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater ,  Anthony K. Stamper

IPC: H01L29/66 ,  H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/66242 ,  H01L29/0649 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/7378

Abstract: Device structures, fabrication methods, and design structures for a bipolar junction transistor. A trench isolation region is formed in a substrate. The trench isolation region is coextensive with a collector in the substrate. A base layer is formed on the collector and on a first portion of the trench isolation region. A dielectric layer is formed on the base layer and on a second portion of the trench isolation region peripheral to the base layer. After the dielectric layer is formed, the trench isolation region is at least partially removed to define an air gap beneath the dielectric layer and the base layer.

公开(公告)号：US09245951B1

公开(公告)日：2016-01-26

申请号：US14487582

申请日：2014-09-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Renata Camillo-Castillo ,  David L. Harame ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater

IPC: H01L21/331 ,  H01L29/08 ,  H01L29/732 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/0826 ,  H01L21/31056 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7325 ,  H01L29/7378

Abstract: Device structures and fabrication methods for a bipolar junction transistor. A layer is formed on a top surface of a substrate. A trench is formed in the layer and has a plurality of sidewalls with a width between an opposite pair of the sidewalls that varies with increasing distance from the top surface of the substrate. A collector pedestal of the bipolar junction transistor is formed in the trench.

Abstract translation: 双极结型晶体管的器件结构和制造方法。 在衬底的顶表面上形成一层。 在该层中形成沟槽并且具有多个侧壁，其宽度在相对的一对侧壁之间的宽度随着距离衬底顶表面的距离的增加而变化。 在沟槽中形成双极结型晶体管的集电极基座。

公开(公告)号：US20160104770A1

公开(公告)日：2016-04-14

申请号：US14968286

申请日：2015-12-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Renata Camillo-Castillo ,  David L. Harame ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater

IPC: H01L29/08 ,  H01L29/732

CPC classification number: H01L29/0826 ,  H01L21/31056 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7325 ,  H01L29/7378

Abstract: Device structures for a bipolar junction transistor. A layer is formed on a top surface of a substrate. A trench is formed in the layer and has a plurality of sidewalls with a width between an opposite pair of the sidewalls that varies with increasing distance from the top surface of the substrate. A collector pedestal of the bipolar junction transistor is formed in the trench.

Abstract translation: 双极结型晶体管的器件结构。 在衬底的顶表面上形成一层。 在该层中形成沟槽并且具有多个侧壁，其宽度在相对的一对侧壁之间的宽度随着距离衬底顶表面的距离的增加而变化。 在沟槽中形成双极结型晶体管的集电极基座。

公开(公告)号：US20160049503A1

公开(公告)日：2016-02-18

申请号：US14925690

申请日：2015-10-28

Applicant: Globalfoundries Inc.

Inventor： Renata Camillo-Castillo ,  David L. Harame ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater

IPC: H01L29/737 ,  H01L29/06 ,  H01L29/04 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/7371 ,  H01L21/7624 ,  H01L21/8249 ,  H01L29/04 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/7325 ,  H01L2924/1305

Abstract: Fabrication methods, device structures, and design structures for a bipolar junction transistor. A dielectric structure is formed that is coextensive with a single crystal semiconductor material of a substrate in an active device region. A semiconductor layer is formed that includes a single crystal section coupled with the active device region. The semiconductor layer has an edge that overlaps with a top surface of the dielectric structure. An intrinsic base layer is formed on the semiconductor layer.

Abstract translation: 双极结晶体管的制造方法，器件结构和设计结构。 形成与有源器件区域中的衬底的单晶半导体材料共同延伸的电介质结构。 形成半导体层，其包括与有源器件区域耦合的单晶部分。 半导体层具有与电介质结构的顶表面重叠的边缘。 在半导体层上形成本征基层。

公开(公告)号：US09219128B2

公开(公告)日：2015-12-22

申请号：US13800091

申请日：2013-03-13

Applicant: GLOBALFOUNDRIES INC.

Inventor： Renata Camillo-Castillo ,  David L. Harame ,  Vibhor Jain ,  Vikas K. Kaushal ,  Marwan H. Khater

IPC: H01L29/73 ,  H01L29/66 ,  H01L21/8249 ,  H01L29/732 ,  H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L21/762

CPC classification number: H01L29/7371 ,  H01L21/7624 ,  H01L21/8249 ,  H01L29/04 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/7325 ,  H01L2924/1305

Abstract: Fabrication methods, device structures, and design structures for a bipolar junction transistor. A dielectric structure is formed that is coextensive with a single crystal semiconductor material of a substrate in an active device region. A semiconductor layer is formed that includes a single crystal section coupled with the active device region. The semiconductor layer has an edge that overlaps with a top surface of the dielectric structure. An intrinsic base layer is formed on the semiconductor layer.

Abstract translation: 双极结晶体管的制造方法，器件结构和设计结构。 形成与有源器件区域中的衬底的单晶半导体材料共同延伸的电介质结构。 形成半导体层，其包括与有源器件区域耦合的单晶部分。 半导体层具有与电介质结构的顶表面重叠的边缘。 在半导体层上形成本征基层。