公开(公告)号：US20160098193A1

公开(公告)日：2016-04-07

申请号：US14877629

申请日：2015-10-07

Applicant: GOOGLE INC.

Inventor： Shinye SHIU

IPC: G06F3/06

CPC classification number: G06F12/1009 ,  G06F3/0604 ,  G06F3/061 ,  G06F3/0638 ,  G06F3/0653 ,  G06F3/0656 ,  G06F3/0673 ,  G06F3/0683 ,  G06F12/0802 ,  G06F12/0864 ,  G06F12/0891 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/12 ,  G06F12/121 ,  G06F2212/1016 ,  G06F2212/1044 ,  G06F2212/401 ,  G06F2212/502 ,  G06F2212/601 ,  G06F2212/604 ,  G06F2212/65 ,  G06F2212/68 ,  G06F2212/683 ,  Y02D10/13 ,  Y02D10/22

Abstract: A method and apparatus are disclosed to monitor system performance and dynamically update memory subsystem settings using software to optimize system performance and power consumption. In an example embodiment, the apparatus monitors a software application's cache performance and provides the software application the cache performance data. The software application, which has a higher-level/macro view of the overall system and better determination of its future requests, analyzes the performance data to determine more optimal memory sub-system settings. The software application provides the system more optimal settings to implement in the memory component to improve the memory and overall system performance and efficiency.

Abstract translation: 公开了一种监测系统性能并使用软件动态更新存储器子系统设置以优化系统性能和功耗的方法和装置。 在示例实施例中，该设备监视软件应用程序的缓存性能，并向软件应用程序提供高速缓存性能数据。 软件应用程序具有整体系统的更高级/宏观视图，并更好地确定其未来请求，分析性能数据以确定更优化的内存子系统设置。 软件应用程序为系统提供更优化的设置，以实现内存组件，以提高内存和整体系统的性能和效率。

公开(公告)号：US20160098353A1

公开(公告)日：2016-04-07

申请号：US14877523

申请日：2015-10-07

Applicant: GOOGLE INC.

Inventor： Shinye SHIU

IPC: G06F12/08 ,  G06F12/12

CPC classification number: G06F12/1009 ,  G06F3/0604 ,  G06F3/061 ,  G06F3/0638 ,  G06F3/0653 ,  G06F3/0656 ,  G06F3/0673 ,  G06F3/0683 ,  G06F12/0802 ,  G06F12/0864 ,  G06F12/0891 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/12 ,  G06F12/121 ,  G06F2212/1016 ,  G06F2212/1044 ,  G06F2212/401 ,  G06F2212/502 ,  G06F2212/601 ,  G06F2212/604 ,  G06F2212/65 ,  G06F2212/68 ,  G06F2212/683 ,  Y02D10/13 ,  Y02D10/22

Abstract: Provided are methods and systems for de-duplicating cache lines in physical memory by detecting cache line data patterns and building a link-list between multiple physical addresses and their common data value. In this manner, the methods and systems are applied to achieve de-duplication of an on-chip cache. A cache line filter includes one table that defines the most commonly duplicated content patterns and a second table that saves pattern numbers from the first table and the physical address for she duplicated cache line. Since a cache line duplicate can be detected during a write operation, each write can involve table lookup and comparison. If there is a hit in the table, only the address is saved instead of the entire data string.

Abstract translation: 提供了通过检测高速缓存线数据模式并在多个物理地址与其公共数据值之间建立链路列表来在物理存储器中去重复高速缓存行的方法和系统。 以这种方式，应用方法和系统来实现片上高速缓存的重复数据删除。 高速缓存行过滤器包括一个定义最常复制的内容模式的表以及从第一个表中保存模式编号的第二个表以及重复的高速缓存行的物理地址。 由于在写入操作期间可以检测到缓存行副本，所以每个写入可以涉及表查找和比较。 如果表中有命中，则只保存地址而不是整个数据字符串。

公开(公告)号：US20160350232A1

公开(公告)日：2016-12-01

申请号：US15165839

申请日：2016-05-26

Applicant: GOOGLE INC.

Inventor： Allan D. KNIES ,  Shinye SHIU ,  Chih-Chung CHANG ,  Vyacheslav Vladimirovich MALYUGIN ,  Santhosh RAO

IPC: G06F12/08 ,  G06F12/10

CPC classification number: G06F12/0893 ,  G06F12/084 ,  G06F12/0888 ,  G06F12/0891 ,  G06F12/1045 ,  G06F12/127 ,  G06F2212/1016 ,  G06F2212/604 ,  G06F2212/6046 ,  G06F2212/68

Abstract: Provided are methods, systems, and apparatus for managing and controlling memory caches, in particular, system level caches outside of those closest to the CPU. The processes and representative hardware structures that implement the processes are designed to allow for detailed control over the behavior of such system level caches. Caching policies are developed based on policy identifiers, where a policy identifier corresponds to a collection of parameters that control the behavior of a set of cache management structures. For a given cache, one policy identifier is stored in each line of the cache.

Abstract translation: 提供了用于管理和控制存储器高速缓存的方法，系统和装置，特别是在最接近CPU的那些之外的系统级高速缓存。 旨在实现这些过程的过程和代表性的硬件结构被设计为允许对这种系统级高速缓存的行为进行详细的控制。 基于策略标识符开发缓存策略，其中策略标识符对应于控制一组缓存管理结构的行为的参数集合。 对于给定的缓存，一个策略标识符存储在高速缓存的每一行中。

公开(公告)号：US20160239209A1

公开(公告)日：2016-08-18

申请号：US15043023

申请日：2016-02-12

Applicant: GOOGLE INC.

Inventor： Vyacheslav Vladimirovich MALYUGIN ,  Luigi SEMENZATO ,  Choon Ping CHNG ,  Santhosh RAO ,  Shinye SHIU

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0673 ,  G06F12/023 ,  G06F12/0804 ,  G06F12/0871 ,  G06F12/0888 ,  G06F2003/0691 ,  G06F2212/401 ,  Y02B70/30 ,  Y02D10/13

Abstract: Provided are methods and systems for memory decompression using a hardware decompressor that minimizes or eliminates the involvement of software. Custom decompression hardware is added to the memory subsystem, where the decompression hardware handles read accesses caused by, for example, cache misses or requests from devices to compressed memory blocks, by reading a compressed block, decompressing it into an internal buffer, and returning the requested portion of the block. The custom hardware is designed to determine if the block is compressed, and determine the parameters of compression, by checking unused high bits of the physical address of the access. This allows compression to be implemented without additional metadata, because the necessary metadata can be stored in unused bits in the existing page table structures.

Abstract translation: 提供了使用最小化或消除软件参与的硬件解压缩器来进行存储器解压缩的方法和系统。 自定义解压缩硬件被添加到存储器子系统中，其中解压缩硬件处理由例如高速缓存未命中或从设备到压缩存储器块的请求引起的读取访问，通过读取压缩块，将其解压缩到内部缓冲器中并返回 块的请求部分。 定制硬件设计用于通过检查访问的物理地址的未使用的高位来确定块是否被压缩，并确定压缩参数。 这允许在没有附加元数据的情况下实现压缩，因为必要的元数据可以存储在现有页表结构中的未使用的位中。

公开(公告)号：US20160098356A1

公开(公告)日：2016-04-07

申请号：US14877484

申请日：2015-10-07

Applicant: GOOGLE INC.

Inventor： Shinye SHIU

IPC: G06F12/10 ,  G06F3/06

CPC classification number: G06F12/1009 ,  G06F3/0604 ,  G06F3/061 ,  G06F3/0638 ,  G06F3/0653 ,  G06F3/0656 ,  G06F3/0673 ,  G06F3/0683 ,  G06F12/0802 ,  G06F12/0864 ,  G06F12/0891 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/12 ,  G06F12/121 ,  G06F2212/1016 ,  G06F2212/1044 ,  G06F2212/401 ,  G06F2212/502 ,  G06F2212/601 ,  G06F2212/604 ,  G06F2212/65 ,  G06F2212/68 ,  G06F2212/683 ,  Y02D10/13 ,  Y02D10/22

Abstract: Provided are methods and systems for managing memory using a hardware-based page filter designed to distinguish between active and inactive pages (“hot” and “cold” pages, respectively) so that inactive pages can be compressed prior to the occurrence of a page fault. The methods and systems are designed to achieve, among other things, lower cost, longer battery life, and faster user response. Whereas existing approaches for memory management are based on pixel or frame buffer compression, the methods and systems provided focus on the CPU's program (e.g., generic data structure). Focusing on hardware-accelerated memory compression to offload CPU translates higher power efficiency (e.g., ASIC is approximately 100× lower power than CPU) and higher performance (e.g., ASIC is approximately 10× faster than CPU), and also allows for hardware-assisted memory management to offload OS/kernel, which significantly increases response time.

Abstract translation: 提供了用于使用基于硬件的页面滤波器设计活动和非活动页面（“热”和“冷”的网页，分别地）之间进行区分管理存储器中，使得非活动页面可以之前的页错误的发生被压缩的方法和系统 。 该方法和系统被设计来实现的，除其他外，较低的成本，更长的电池寿命，和更快的用户响应。 而对于存储器管理的现有方法是基于像素或帧缓存压缩，所述方法和系统的CPU的程序（例如，通用数据结构）提供焦点。 着眼于硬件加速存储器压缩卸载CPU转换更高的功率效率（例如，ASIC比CPU约100×较低的功率）和更高的性能（例如，ASIC是大约10×比CPU更快），并且还允许硬件辅助 内存管理卸载OS /内核，这显着增加了响应时间。