公开(公告)号：US20230197798A1

公开(公告)日：2023-06-22

申请号：US17645738

申请日：2021-12-22

Applicant: GlobalFoundries U.S. Inc.

Inventor： JOHNATAN AVRAHAM KANTAROVSKY

IPC: H01L29/40 ,  H01L29/423 ,  H01L29/778 ,  H01L21/76 ,  H01L21/765 ,  H01L29/66

CPC classification number: H01L29/404 ,  H01L21/765 ,  H01L21/7605 ,  H01L29/7786 ,  H01L29/42316 ,  H01L29/66462

Abstract: A transistor structure is provided, the transistor structure comprising a source, a drain, and a gate between the source and the drain. The gate may have a top surface. A first field plate may be between the source and the drain. The first field plate may be L-shaped and having a vertical portion over a horizontal portion. A top surface of the vertical portion of the first field plate may be at least as high as the top surface of the gate. A second field plate, whereby the second field plate may be connected to the gate and the second field plate may partially overlap the horizontal portion of the first field plate.

公开(公告)号：US20230124962A1

公开(公告)日：2023-04-20

申请号：US17503345

申请日：2021-10-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： VIBHOR JAIN ,  JOHNATAN AVRAHAM KANTAROVSKY ,  MARK DAVID LEVY ,  EPHREM GEBRESELASIE ,  YVES NGU ,  SIVA P. ADUSUMILLI

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/43 ,  H01L29/49 ,  H01L29/66

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

公开(公告)号：US20220165853A1

公开(公告)日：2022-05-26

申请号：US17650854

申请日：2022-02-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： JOHNATAN AVRAHAM KANTAROVSKY ,  RAJENDRAN KRISHNASAMY ,  SIVA P. ADUSUMILLI ,  STEVEN BENTLEY ,  MICHAEL JOSEPH ZIERAK ,  JEONGHYUN HWANG

IPC: H01L29/40 ,  H01L29/778 ,  H01L29/66

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor devices having field plates that are arranged symmetrically around a gate. The present disclosure provides a semiconductor device including an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region and laterally between the source and drain electrodes, a first field plate between the source electrode and the gate, a second field plate between the drain electrode and the gate, in which the gate is spaced apart laterally and substantially equidistant from the first field plate and the second field plate.

公开(公告)号：US20230420326A1

公开(公告)日：2023-12-28

申请号：US17808110

申请日：2022-06-22

Applicant: GlobalFoundries U.S. INC.

Inventor： ZHONG-XIANG HE ,  RAMSEY HAZBUN ,  RAJENDRAN KRISHNASAMY ,  JOHNATAN AVRAHAM KANTAROVSKY ,  MICHEL ABOU-KHALIL ,  RICHARD RASSEL

IPC: H01L23/367 ,  H01L23/48 ,  H01L21/48

CPC classification number: H01L23/367 ,  H01L29/778 ,  H01L21/4882 ,  H01L23/481

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a semiconductor layer, a device layer, and heat dissipating structures. The semiconductor layer is over the substrate and the device layer is over the semiconductor layer. The device layer includes a first ohmic contact and a second ohmic contact. The heat dissipating structures are at least through the substrate and the semiconductor layer, and between the first ohmic contact and the second ohmic contact.

公开(公告)号：US20240038882A1

公开(公告)日：2024-02-01

申请号：US18487115

申请日：2023-10-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： VIBHOR JAIN ,  JOHNATAN AVRAHAM KANTAROVSKY ,  MARK DAVID LEVY ,  EPHREM GEBRESELASIE ,  YVES NGU ,  SIVA P. ADUSUMILLI

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/66 ,  H01L29/49 ,  H01L29/43

CPC classification number: H01L29/7781 ,  H01L29/407 ,  H01L29/66431 ,  H01L29/4916 ,  H01L29/4983 ,  H01L29/435

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

公开(公告)号：US20240038881A1

公开(公告)日：2024-02-01

申请号：US18487114

申请日：2023-10-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： VIBHOR JAIN ,  JOHNATAN AVRAHAM KANTAROVSKY ,  MARK DAVID LEVY ,  EPHREM GEBRESELASIE ,  YVES NGU ,  SIVA P. ADUSUMILLI

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/66 ,  H01L29/49 ,  H01L29/43

CPC classification number: H01L29/7781 ,  H01L29/407 ,  H01L29/66431 ,  H01L29/4916 ,  H01L29/4983 ,  H01L29/435

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.