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公开(公告)号：US10109346B2
公开(公告)日：2018-10-23
申请号：US15320788
申请日：2014-07-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Hans S. Cho , Gary Gibson , Brent Buchanan
Abstract: According to an example, an apparatus may include an input line, an output line, and a memory cell connected between the input line and the output line. The memory cell may include a memristor connected in series with a selector. The apparatus may also include a shunt device connected to the input line, in which the shunt device is to divert a portion of current away from the memory cell in response to a voltage at the input line being greater than a threshold voltage.
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公开(公告)号：US09954165B2
公开(公告)日：2018-04-24
申请号：US15500085
申请日：2015-01-09
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Hans S. Cho , Yoocharn Jeon
CPC classification number: H01L45/124 , H01L45/04 , H01L45/12 , H01L45/1233 , H01L45/1616 , H01L45/1675
Abstract: In the examples provided herein, a device is described that has a stack of structure layers including a first structure layer and a second structure layer that are different materials, where the first structure layer is positioned higher in the stack than the second structure layer. The device also has a first sidewall spacer deposited conformally and circumferentially around an upper portion of the stack that includes the first structure layer. Further, the device has a second sidewall spacer deposited conformally and circumferentially around the first sidewall spacer and an additional portion of the stack that includes the second structure layer, where a height of the first sidewall spacer along the stack is different from a height of the second sidewall spacer.
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公开(公告)号：US20170200495A1
公开(公告)日：2017-07-13
申请号：US15320788
申请日：2014-07-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Hans S. Cho , Gary Gibson , Brent Buchanan
CPC classification number: G11C13/004 , G11C7/04 , G11C13/0007 , G11C13/0028 , G11C13/0033 , G11C13/0069 , G11C2213/72 , G11C2213/76 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146
Abstract: According to an example, an apparatus may include an input line, an output line, and a memory cell connected between the input line and the output line. The memory cell may include a memristor connected in series with a selector. The apparatus may also include a shunt device connected to the input line, in which the shunt device is to divert a portion of current away from the memory cell in response to a voltage at the input line being greater than a threshold voltage.
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公开(公告)号：US10062842B2
公开(公告)日：2018-08-28
申请号：US15500044
申请日：2015-01-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Hans S. Cho
CPC classification number: H01L45/1253 , H01L27/2409 , H01L27/2418 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/16
Abstract: A composite selector electrode includes a switching layer coupled in electrical parallel with a conducting layer. The switching layer is electrically insulating when the temperature of the switching layer is below a threshold temperature. The switching layer exhibits insulator-metal transition at the threshold temperature. The switching layer is electrically conducting when the temperature of the switching layer is above the threshold temperature.
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公开(公告)号：US09847482B2
公开(公告)日：2017-12-19
申请号：US15305599
申请日：2014-04-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Hans S. Cho
CPC classification number: H01L45/1683 , H01L45/08 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/1633 , H01L45/1658 , H01L45/1675
Abstract: A resistive memory device includes a bottom electrode and a top electrode crossing the bottom electrode at a non-zero angle. A switching region operatively contacts the bottom electrode and the top electrode. The switching region defines a current path between the bottom electrode and the top electrode in an ON state. An oxygen-supplying layer operatively contacts a portion of the switching region. The oxygen-supplying layer is positioned orthogonally to the current path and to the switching region.
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Patent Agency Ranking
公开(公告)号：US09847378B2
公开(公告)日：2017-12-19
申请号：US15306125
申请日：2014-04-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Xia Sheng , Yoocharn Jeon , Jianhua Yang , Hans S. Cho , Richard H. Henze
CPC classification number: H01L27/2463 , G11C13/0002 , G11C13/003 , G11C2213/52 , G11C2213/71 , G11C2213/73 , H01L27/2481 , H01L27/249 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/1273 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1616 , H01L45/1675 , H01L45/1683
Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.
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公开(公告)号：US20170271588A1
公开(公告)日：2017-09-21
申请号：US15500044
申请日：2015-01-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Hans S. Cho
CPC classification number: H01L45/1253 , H01L27/2409 , H01L27/2418 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/16
Abstract: A composite selector electrode includes a switching layer coupled in electrical parallel with a conducting layer. The switching layer is electrically insulating when the temperature of the switching layer is below a threshold temperature. The switching layer exhibits insulator-metal transition at the threshold temperature. The switching layer is electrically conducting when the temperature of the switching layer is above the threshold temperature.
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公开(公告)号：US20170053968A1
公开(公告)日：2017-02-23
申请号：US15306125
申请日：2014-04-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Xia Sheng , Yoocharn Jeon , Jianhua Yang , Hans S. Cho , Richard H. Henze
CPC classification number: H01L27/2463 , G11C13/0002 , G11C13/003 , G11C2213/52 , G11C2213/71 , G11C2213/73 , H01L27/2481 , H01L27/249 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/1273 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1616 , H01L45/1675 , H01L45/1683
Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.
Abstract translation: 电阻式存储器件包括与导体接触的导体和电阻式存储器堆叠。 电阻式存储器堆叠包括多组分电极和开关区域。 多组分电极包括具有表面的基极电极和基极电极表面上的惰性材料电极，其形式为i）薄层，或ii）不连续的纳米岛。 当惰性材料电极为薄层形式时，开关区域与导体和惰性材料电极接触; 或者当惰性材料电极为不连续的纳米岛的形式时，开关区域与惰性材料电极接触导体，并与基极的氧化部分接触。
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公开(公告)号：US20160267976A1
公开(公告)日：2016-09-15
申请号：US15031853
申请日：2013-10-31
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Hans S. Cho
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/0007 , G11C13/0026 , G11C13/0028 , G11C2013/0073 , G11C2013/0092
Abstract: A method to program a memristive device includes applying a pulse sequence including at least a series of pulses in alternating polarity to set the memristive device. The series has an odd number of pulses where odd numbered pulses have a first electrical polarity that switches the device to the state and even numbered pulse or pulses have a second electrical polarity.
Abstract translation: 一种对忆阻器件进行编程的方法包括施加包含交替极性的至少一系列脉冲的脉冲序列以设置忆阻器件。 该系列具有奇数个脉冲，其中奇数脉冲具有将器件切换到该状态的第一电极性，偶数脉冲或脉冲具有第二电极性。
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公开(公告)号：US09911915B2
公开(公告)日：2018-03-06
申请号：US15318089
申请日：2014-07-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Jianhua Yang , Yoocharn Jeon , Hans S. Cho
CPC classification number: H01L45/146 , H01L27/2418 , H01L45/08 , H01L45/1233 , H01L45/165
Abstract: A multiphase selector includes a first electrode, a switching layer coupled to the first electrode, a capping layer coupled to the switching layer, and a second electrode coupled to the capping layer. The switching layer may include a matrix having a first, relatively insulating phase of a transition metal oxide; a second, relatively conducting phase of the transition metal oxide dispersed in the matrix; and a catalyst, located within the matrix, to interact with the first phase of the transition metal oxide to selectively form and position the second phase of the transition metal oxide within the matrix.
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