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公开(公告)号：US11942937B2
公开(公告)日：2024-03-26
申请号：US17736517
申请日：2022-05-04
申请人： Charles Ryan Wallace , Max E. Nielsen , Alexander Louis Braun , Daniel George Dosch , Kurt Pleim , Haitao O. Dai
发明人： Charles Ryan Wallace , Max E. Nielsen , Alexander Louis Braun , Daniel George Dosch , Kurt Pleim , Haitao O. Dai
IPC分类号： H03K19/195 , H03K3/38 , H03K19/17736 , H03K19/20
CPC分类号： H03K19/195 , H03K3/38 , H03K19/1774 , H03K19/17744 , H03K19/20
摘要： Pulse-generator-based reciprocal quantum logic (RQL) bias-level sensors are fabricated on an RQL integrated circuit (IC) to sample AC or DC bias values provided to operational RQL circuitry on the RQL IC. The bias-level sensors include pulse generators having strengthened or weakened bias taps (transformer couplings to RQL AC clock resonators or DC bias lines) as compared to bias taps of Josephson transmission lines in the operational RQL circuitry, or Josephson junctions (JJs) with larger or smaller critical currents as compared to JJs in the operational RQL circuitry. Pulse generators with weakened bias taps or larger JJs can have lower limits of their operational ranges placed near an optimal bias point at the centroid of the operating region of the operational RQL circuitry. The bias-level sensors can be staged by relative strength to indicate whether a provided bias value is an improvement when varied over a range.
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公开(公告)号：US11804275B1
公开(公告)日：2023-10-31
申请号：US17736564
申请日：2022-05-04
申请人： Alexander Louis Braun , Max E. Nielsen , Daniel George Dosch , Kurt Pleim , Haitao O. Dai , Charles Ryan Wallace
发明人： Alexander Louis Braun , Max E. Nielsen , Daniel George Dosch , Kurt Pleim , Haitao O. Dai , Charles Ryan Wallace
CPC分类号： G11C19/32 , H03K3/037 , H03K3/38 , H03K19/195 , H03L7/0805 , H03L7/0816
摘要： Shift register elements of a phase-mode bit-addressable sensing register sample varied AC or DC bias values provided to operational RQL circuitry on the RQL IC via clock resonators or DC bias lines. The shift register can be constructed of phase-mode D flip-flops and JTLs as data and clock lines. A method of using the sensing register includes shifting in a data bit pattern while a bias parameter (e.g., AC amplitude, DC value, or phase) is set to a nominal value; stopping the logical clock that controls the shifting of values through the sensing register, varying the bias parameter value, inputting one assertion SFQ pulse or reciprocal pulse pair into the logical clock, restoring the bias parameter to the nominal value, restarting the logical clock to shift out an output data bit pattern, and observing the output data bit pattern to determine the effect of the bias parameter value change.
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公开(公告)号：US12045692B2
公开(公告)日：2024-07-23
申请号：US17736646
申请日：2022-05-04
申请人： Haitao O. Dai , Max E. Nielsen , Alexander Louis Braun , Daniel George Dosch , Kurt Pleim , Charles Ryan Wallace
发明人： Haitao O. Dai , Max E. Nielsen , Alexander Louis Braun , Daniel George Dosch , Kurt Pleim , Charles Ryan Wallace
IPC分类号： G06N10/40 , G01R33/035
CPC分类号： G06N10/40 , G01R33/0354
摘要： An output-amplifier-based reciprocal quantum logic (RQL) bias-level sensor is used to measure and/or calibrate bias parameters of AC and/or DC bias signals provided to RQL circuitry. The bias signals can include an output amplifier output bias current. The bias-level sensor includes a stack of DC SQUIDs that are supplied their inputs from outputs of respective Josephson transmission lines (JTLs) to which the SQUIDs are transformer-coupled. Staging relative strengths of the bias taps of the JTLs, or the critical currents of the Josephson junctions in the DC SQUIDs, allows an output voltage signal of the bias-level sensor to be indicative of whether a provided bias value is an improvement or optimization of the bias value when varied over a range. The outputs of two such bias-level sensors driven by I and Q clocks can be compared to adjust AC bias amplitudes of the clocks. Relative clock phase can be similarly adjusted.
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公开(公告)号：US09162255B1
公开(公告)日：2015-10-20
申请号：US12686685
申请日：2010-01-13
申请人： John R. Stice , Yanwei Wang , Clinton T. Siedenburg , Andrew K. Lundberg , Justin Coughlin , Max E. Nielsen
发明人： John R. Stice , Yanwei Wang , Clinton T. Siedenburg , Andrew K. Lundberg , Justin Coughlin , Max E. Nielsen
CPC分类号： B06B1/0215 , A61B8/44 , A61B8/4444 , A61B8/4494 , A61B8/5207 , A61B8/5269 , A61B8/54 , B06B1/0207 , B06B1/0223 , B06B1/023 , G01S7/5202 , G01S7/52038 , G01S15/8963
摘要： The use of power-efficient transmitters to establish acoustic wave energy having low undesirable harmonics is achieved by adjusting the transmitter output waveform to minimize the undesirable harmonics. In one embodiment, both the timing and slope of the waveform edges are adjusted to produce the desired output waveform having little or no second harmonics. In the embodiment, output waveform timing adjustments on the order of fractions of the system clock interval are provided. This then allows for very fine control of a coarsely produced waveform. In one embodiment, the user can select the fine tuning to match the transmitter output signal to a particular load transducer.
摘要翻译： 通过调整发射机输出波形以最小化不期望的谐波来实现使用功率高效的发射机来建立具有低不期望的谐波的声波能量。 在一个实施例中，调整波形边缘的定时和斜率，以产生具有很少或不具有二次谐波的期望的输出波形。 在本实施例中，提供了系统时钟间隔分数的顺序的输出波形定时调整。 这样可以很好地控制粗略产生的波形。 在一个实施例中，用户可以选择微调以将发射机输出信号与特定负载传感器相匹配。
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公开(公告)号：US10431867B1
公开(公告)日：2019-10-01
申请号：US16012517
申请日：2018-06-19
摘要： One embodiment includes a clock distribution system. The system includes a first resonator spine that propagates a first clock signal and a second resonator spine that propagates a second clock signal that is out-of-phase relative to the first clock signal. The system also includes at least one resonator rib each conductively coupled to at least one of the first and second resonator spines and being arranged as a standing wave resonator with respect to a respective at least one of the first and second clock signals to inductively provide the respective at least one of the first and second clock signals to an associated circuit via a respective transformer-coupling line. The system further includes an isolation element configured to mitigate at least one of inductive and capacitive coupling between the first and second clock signals.
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公开(公告)号：US5929498A
公开(公告)日：1999-07-27
申请号：US40502
申请日：1998-03-17
IPC分类号： G01P15/125 , B81B3/00 , B81C1/00 , G01L9/00 , G01L9/12 , H01L21/762 , H01L21/764 , H01L21/768 , H01L23/10 , H01L29/84 , H01L29/82
CPC分类号： B81C1/00293 , B81C1/00301 , G01L9/0042 , G01L9/0073 , H01L21/76251 , H01L21/764 , H01L21/76898 , H01L23/10 , B81B2207/092 , B81C2203/019 , B81C2203/036 , H01L2924/0002
摘要： A semiconductor device has a flexible structure bonded to a semiconductor substructure to form a cavity. The flexible structure is bonded over a conducting feed-through without the feed-through interfering with a hermetic seal formed by bonding. One embodiment of the device includes depressions that contain edges of a diffused feed-through so that imperfections at the edge of the diffusion do not interfere with bonding. The flexible structure is bonded to elevated areas thus hiding the imperfections. In one embodiment, a first elevated region is surrounded by a second elevated region, and diffusion for the feed-through extends from an active region in the cavity across the first elevated region with edges of the diffusion being between the first and second elevated regions. The flexible structure can thus bond to the first and second elevated regions without interference from the edge of the diffused feed-through. A via through the flexible structure to the first elevated region provides electrical contact with the active region. Another embodiment has either a surface or buried well in a semiconductor structure and extending from an active region in the cavity to a point outside the perimeter of the flexible structure. The well provides a conductive feed-through structure without creating imperfections that would interfere with the bonding that seals the cavity.
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公开(公告)号：US20210080995A1
公开(公告)日：2021-03-18
申请号：US17103055
申请日：2020-11-24
申请人： Joshua A. Strong , Max E. Nielsen
发明人： Joshua A. Strong , Max E. Nielsen
摘要： One embodiment includes a clock distribution system. The system includes at least one resonator spine that propagates a clock signal and at least one resonator rib conductively coupled to the at least one resonator spine and being arranged as a standing wave resonator. At least one of the at least one resonator rib has a thickness that varies along a length of the respective one of the at least one resonator rib. The system also includes at least one transformer-coupling line. Each of the at least one transformer-coupling line can be conductively coupled to an associated circuit and being inductively coupled to the at least one resonator rib to inductively generate a clock current corresponding to the clock signal to provide functions for the associated circuit.
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公开(公告)号：US11429135B1
公开(公告)日：2022-08-30
申请号：US17199028
申请日：2021-03-11
摘要： One example includes a clock distribution system. The system includes a resonator feed network comprising a plurality of resonant transmission lines that each propagate a clock signal. The system also includes at least one resonator spine. Each of the at least one resonator spine can be conductively coupled to at least one of the resonant transmission lines, such that each of the at least one resonator spine propagates the clock signal. The system further includes at least one resonator rib conductively coupled to at least one of the at least one resonator spine. Each of the at least one resonator rib can be arranged as a standing wave resonator to propagate the clock signal.
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公开(公告)号：US11231742B1
公开(公告)日：2022-01-25
申请号：US17194462
申请日：2021-03-08
申请人： Bouchaib Cherif , Max E. Nielsen
发明人： Bouchaib Cherif , Max E. Nielsen
摘要： One example includes a clock distribution resonator system. The system includes a clock source configured to generate a clock signal having a predefined wavelength. The system also includes a plurality of transmission line branches each coupled to the clock source to propagate the clock signal. The system also includes a plurality of clock distribution networks coupled to the respective plurality of transmission line branches and being configured to provide the clock signal to each of a plurality of circuits. The system further includes at least one damping resonator. Each of the at least one damping resonator can be coupled to a respective at least one of the transmission line branches and configured to propagate the clock signal. The at least one damping resonator can have at least one resonator characteristic that is different relative to a respective resonator characteristic(s) associated with the transmission line branches and/or the clock distribution networks.
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公开(公告)号：US10884450B2
公开(公告)日：2021-01-05
申请号：US15913471
申请日：2018-03-06
申请人： Joshua A. Strong , Max E. Nielsen
发明人： Joshua A. Strong , Max E. Nielsen
摘要： One embodiment includes a clock distribution system. The system includes at least one resonator spine that propagates a clock signal and at least one resonator rib conductively coupled to the at least one resonator spine and being arranged as a standing wave resonator. At least one of the at least one resonator rib has a thickness that varies along a length of the respective one of the at least one resonator rib. The system also includes at least one transformer-coupling line. Each of the at least one transformer-coupling line can be conductively coupled to an associated circuit and being inductively coupled to the at least one resonator rib to inductively generate a clock current corresponding to the clock signal to provide functions for the associated circuit.
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