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公开(公告)号：US11895928B2
公开(公告)日：2024-02-06
申请号：US16592210
申请日：2019-10-03
发明人： Jesmin Haq , Tom Zhong , Luc Thomas , Zhongjian Teng , Dongna Shen
摘要： A three terminal spin-orbit-torque (SOT) device is disclosed wherein a free layer (FL) with a switchable magnetization is formed on a Spin Hall Effect (SHE) layer comprising a Spin Hall Angle (SHA) material. The SHE layer has a first side contacting a first bottom electrode (BE) and an opposite side contacting a second BE where the first and second BE are separated by a dielectric spacer. A first current is applied between the two BE, and the SHE layer generates SOT on the FL thereby switching the FL magnetization to an opposite perpendicular-to-plane direction. The SHE layer is a positive or negative SHA material, and may be a topological insulator such as Bi2Sb3. A top electrode is formed on an uppermost hard mask in each SOT device. A single etch through the FL and SHE layer ensures a reliable first current pathway that is separate from a read current pathway.
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公开(公告)号：US20230217834A1
公开(公告)日：2023-07-06
申请号：US18119959
申请日：2023-03-10
发明人： Vignesh Sundar , Yi Yang , Dongna Shen , Zhongjian Teng , Jesmin Haq , Sahil Patel , Yu-Jen Wang , Tom Zhong
摘要： A plurality of conductive via connections are fabricated on a substrate located at positions where MTJ devices are to be fabricated, wherein a width of each of the conductive via connections is smaller than or equivalent to a width of the MTJ devices. The conductive via connections are surrounded with a dielectric layer having a height sufficient to ensure that at the end of a main MTJ etch, an etch front remains in the dielectric layer surrounding the conductive via connections. Thereafter, a MTJ film stack is deposited on the plurality of conductive via connections surrounded by the dielectric layer. The MTJ film stack is etched using an ion beam etch process (IBE), etching through the MTJ film stack and into the dielectric layer surrounding the conductive via connections to form the MTJ devices wherein by etching into the dielectric layer, re-deposition on sidewalls of the MTJ devices is insulating.
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3.发明授权公开(公告)号：US11289645B2
公开(公告)日：2022-03-29
申请号：US16236705
申请日：2018-12-31
发明人： Yi Yang , Vignesh Sundar , Dongna Shen , Sahil Patel , Ru-Ying Tong , Yu-Jen Wang
摘要： A complementary metal oxide semiconductor (CMOS) device comprises a first metal line, a first metal via on the first metal line, a magnetic tunneling junction (MTJ) device on the first metal via wherein the first metal via acts as a bottom electrode for the MTJ device, a second metal via on the MTJ device, and a second metal line on the second metal via.
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公开(公告)号：US20190064661A1
公开(公告)日：2019-02-28
申请号：US15685240
申请日：2017-08-24
发明人： Yi Yang , Dongna Shen , Jesmin Haq , Yu-Jen Wang
CPC分类号： G03F7/0048 , H01J37/32082
摘要： A process flow for shrinking a critical dimension (CD) in photoresist features and reducing CD non-uniformity across a wafer is disclosed. A photoresist pattern is treated with halogen plasma to form a passivation layer with thickness (t1) on feature sidewalls, and thickness (t2) on the photoresist top surface where t2>t1. Thereafter, an etch based on O2, or O2 with a fluorocarbon or halogen removes the passivation layer and shrinks the CD. The passivation layer slows the etch such that photoresist thickness is maintained while CD shrinks to a greater extent for features having a width (d1) than on features having width (d2) where d1>d2. Accordingly, CD non-uniformity is reduced from 2.3% to 1% when d2 is 70 nm and is shrunk to 44 nm after the aforementioned etch. After a second etch through a MTJ stack to form MTJ cells, CD non-uniformity is maintained at 1%.
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5.发明授权公开(公告)号：US10038138B1
公开(公告)日：2018-07-31
申请号：US15728839
申请日：2017-10-10
发明人： Sahil Patel , Yu-Jen Wang , Dongna Shen
摘要： A process flow for forming and encapsulating magnetic tunnel junction (MTJ) nanopillars is disclosed wherein MTJ layers including a reference layer (RL), free layer (FL), and tunnel barrier layer (TB) are first patterned by reactive ion etching or ion beam etching to form MTJ sidewalls. A plurality of MTJs on a substrate is heated (annealed) at a station in a process chamber to substantially crystallize the RL, FL, and TB to a body centered cubic (bcc) structure without recrystallization from the edge of the device before an encapsulation layer is deposited thereby ensuring lattice matching between the RL and TB, and between the FL and TB. The encapsulation layer is deposited at the same station as the anneal step without breaking vacuum, and preferably using a physical vapor deposition to prevent reactive species from attacking MTJ sidewalls. Magnetoresistive ratio is improved especially for MTJs with critical dimensions below 70 nm.
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公开(公告)号：US11631802B2
公开(公告)日：2023-04-18
申请号：US16677053
申请日：2019-11-07
发明人： Vignesh Sundar , Yi Yang , Dongna Shen , Zhongjian Teng , Jesmin Haq , Sahil Patel , Yu-Jen Wang , Tom Zhong
IPC分类号： H01L43/00 , H01L41/47 , H01L41/047 , H01L41/332 , H01L41/06 , H01L41/053 , H01L41/20
摘要： A plurality of conductive via connections are fabricated on a substrate located at positions where MTJ devices are to be fabricated, wherein a width of each of the conductive via connections is smaller than or equivalent to a width of the MTJ devices. The conductive via connections are surrounded with a dielectric layer having a height sufficient to ensure that at the end of a main MTJ etch, an etch front remains in the dielectric layer surrounding the conductive via connections. Thereafter, a MTJ film stack is deposited on the plurality of conductive via connections surrounded by the dielectric layer. The MTJ film stack is etched using an ion beam etch process (IBE), etching through the MTJ film stack and into the dielectric layer surrounding the conductive via connections to form the MTJ devices wherein by etching into the dielectric layer, re-deposition on sidewalls of the MTJ devices is insulating.
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公开(公告)号：US11031548B2
公开(公告)日：2021-06-08
申请号：US16672981
申请日：2019-11-04
发明人： Dongna Shen , Yi Yang , Sahil Patel , Vignesh Sundar , Yu-Jen Wang
摘要： A method for fabricating a magnetic tunneling junction (MTJ) structure is described. A MTJ film stack is deposited on a bottom electrode on a substrate. The MTJ film stack is first ion beam etched (IBE) using a first angle and a first energy to form a MTJ device wherein conductive re-deposition forms on sidewalls of the MTJ device. Thereafter, the conductive re-deposition is oxidized. Thereafter, the MTJ device is second ion beam etched (IBE) at a second angle and a second energy to remove oxidized re-deposition.
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公开(公告)号：US20210143322A1
公开(公告)日：2021-05-13
申请号：US16677053
申请日：2019-11-07
发明人： Vignesh Sundar , Yi Yang , Dongna Shen , Zhongjian Teng , Jesmin Haq , Sahil Patel , Yu-Jen Wang , Tom Zhong
IPC分类号： H01L41/47 , H01L41/047 , H01L41/20 , H01L41/06 , H01L41/053 , H01L41/332
摘要： A plurality of conductive via connections are fabricated on a substrate located at positions where MTJ devices are to be fabricated, wherein a width of each of the conductive via connections is smaller than or equivalent to a width of the MTJ devices. The conductive via connections are surrounded with a dielectric layer having a height sufficient to ensure that at the end of a main MTJ etch, an etch front remains in the dielectric layer surrounding the conductive via connections. Thereafter, a MTJ film stack is deposited on the plurality of conductive via connections surrounded by the dielectric layer. The MTJ film stack is etched using an ion beam etch process (IBE), etching through the MTJ film stack and into the dielectric layer surrounding the conductive via connections to form the MTJ devices wherein by etching into the dielectric layer, re-deposition on sidewalls of the MTJ devices is insulating.
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公开(公告)号：US10134981B1
公开(公告)日：2018-11-20
申请号：US15789150
申请日：2017-10-20
发明人： Yi Yang , Dongna Shen , Yu-Jen Wang
摘要： A magnetic tunnel junction (MTJ) that avoids electrical shorts and has improved data retention is disclosed. An uppermost capping layer has a first sidewall that is coplanar with an interface between outer oxidized portions and a center ferromagnetic portion of a free layer (FL) that has a FL width (FLW). A dielectric spacer is formed on the first sidewall and oxidized outer FL portions. The pinned layer (PL) has a width (PLW) substantially greater than FLW, and a second sidewall thereon is formed by a self-aligned etch using the dielectric spacer and capping layer as an etch mask. A sidewall layer may be formed on the second sidewall and dielectric spacer but does not degrade MTJ properties since the sidewall layer does not contact the FL and PL center portions responsible for device performance. PL width>FLW ensures greater capability for data retention especially for FLW
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10.发明申请公开(公告)号：US20180331279A1
公开(公告)日：2018-11-15
申请号：US15595484
申请日：2017-05-15
发明人： Dongna Shen , Yu-Jen Wang , Ru-Ying Tong , Vignesh Sundar , Sahil Patel
IPC分类号： H01L43/12 , H01L21/306 , B82Y40/00 , B81C1/00 , H01L21/3065
CPC分类号： H01L43/12 , B81C1/00111 , B81C1/00523 , B82Y40/00 , H01L21/30604 , H01L21/3065
摘要： A process flow for forming magnetic tunnel junction (MTJ) nanopillars with minimal sidewall residue and minimal sidewall damage is disclosed wherein a pattern is first formed in a hard mask that is an uppermost MTJ layer. Thereafter, the hard mask sidewall is etch transferred through the remaining MTJ layers including a reference layer, free layer, and tunnel barrier between the free layer and reference layer. The etch transfer may be completed in a single RIE step that features a physical component involving inert gas ions or plasma, and a chemical component comprised of ions or plasma generated from one or more of methanol, ethanol, ammonia, and CO. In other embodiments, a chemical treatment with one of the aforementioned chemicals, and a volatilization at 50° C. to 450° C. may follow an etch transfer through the MTJ stack with an ion beam etch or plasma etch involving inert gas ions.
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