Semiconductor device and method of manufacture thereof
    2.
    发明申请
    Semiconductor device and method of manufacture thereof 有权
    半导体装置及其制造方法

    公开(公告)号:US20050224796A1

    公开(公告)日:2005-10-13

    申请号:US11137513

    申请日:2005-05-26

    摘要: There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.

    摘要翻译: 提供了一种方法,通过该方法可以容易地形成轻掺杂漏极(LDD)区域,并且在具有覆盖有氧化物覆盖层的栅电极的薄膜晶体管中的源/漏区域中以良好的产率形成。 通过以栅极电极作为掩模,以自对准的方式将杂质引入岛状硅膜形成轻掺杂漏极(LDD)区域。 首先,通过使用旋转 - 倾斜离子注入在岛状硅膜中形成低浓度杂质区,以相对于衬底从倾斜方向进行离子掺杂。 此时也在栅电极下方形成低浓度杂质区。 之后,将高浓度的杂质通常引入衬底,从而形成高浓度杂质区域。 在上述过程中,低浓度杂质区域保留在栅电极下方并构成轻掺杂漏区。

    Process for fabricating thin-film semiconductor device without plasma
induced damage
    4.
    发明授权
    Process for fabricating thin-film semiconductor device without plasma induced damage 失效
    用于制造没有等离子体引起的损伤的薄膜半导体器件的工艺

    公开(公告)号:US5728259A

    公开(公告)日:1998-03-17

    申请号:US545122

    申请日:1995-10-19

    摘要: Disclosed herein is a process for fabricating a thin-film semiconductor device which includes (1) a step of etching a silicon film by wet etching or gas etching, the former employing a liquid containing hydrazine or ethylene diamine, the latter employing chlorine fluoride, thereby forming an island-like silicon semiconductor region having inclined edges, and (2) a step of forming thereon a gate insulating film by plasma-free process such as heated CVD. The process yields the island-like silicon region and gate insulating film completely free from plasma-induced damage. This reduces the leakage current between the source and drain (which is due to plasma-induced damage) and prevents the degradation of characteristic properties.

    摘要翻译: 本文公开了一种制造薄膜半导体器件的方法,其包括(1)通过湿蚀刻或气蚀刻蚀硅膜的步骤,前者采用含有肼或乙二胺的液体,后者采用氯氟化物 形成具有倾斜边缘的岛状硅半导体区域,以及(2)通过无等离子体工艺(例如加热CVD)在其上形成栅极绝缘膜的步骤。 该工艺使岛状硅区和栅极绝缘膜完全没有等离子体引起的损伤。 这减少了源极和漏极之间的泄漏电流(这是由于等离子体引起的损坏),并且防止了特性的降低。

    Method for fabricating a semiconductor device
    5.
    发明授权
    Method for fabricating a semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号:US5641380A

    公开(公告)日:1997-06-24

    申请号:US566175

    申请日:1995-12-01

    CPC分类号: H01L29/6659 H01L21/32137

    摘要: There is proposed a process for performing (quasi-) anisotropic etching on a silicon-based material without using plasma. The process consists of irradiating a polycrystalline or single-crystalline silicon film or substrate with a beam of accelerated hydrogen ions, silicon ions, or rare gas ions, so that the crystalline silicon is made amorphous. Then, the amorphous silicon is placed in an atmosphere of fluorinated halogen. Since the etching rate of fluorinated halogen for amorphous silicon is greater than that for polycrystalline or single-crystalline silicon, etching takes place selectively at the area which has been irradiated with a beam of accelerated hydrogen ions, silicon ions, or rare gas ions. The selective etching permits (quasi-) anisotropic etching instead of sideward isotropic etching.

    摘要翻译: 提出了在不使用等离子体的情况下对硅基材料进行(准)各向异性蚀刻的方法。 该方法包括用加速的氢离子,硅离子或稀有气体离子的束照射多晶或单晶硅膜或衬底,使得晶体硅是无定形的。 然后,将非晶硅置于氟化卤素气氛中。 由于非晶硅的氟化卤素的蚀刻速率大于多晶或单晶硅的蚀刻速率,所以在已经用加速的氢离子,硅离子或稀有气体离子的束照射的区域上选择性地进行蚀刻。 选择性蚀刻允许(准)各向异性蚀刻而不是侧向各向同性蚀刻。

    Semiconductor integrated circuit and method of fabricating same
    7.
    发明授权
    Semiconductor integrated circuit and method of fabricating same 失效
    半导体集成电路及其制造方法

    公开(公告)号:US07968886B2

    公开(公告)日:2011-06-28

    申请号:US12361923

    申请日:2009-01-29

    IPC分类号: H01L21/00

    摘要: A semiconductor integrated circuit comprising thin-film transistors in each of which the second wiring is prevented from breaking at steps. A silicon nitride film is formed on gate electrodes and on gate wiring extending from the gate electrodes. Substantially triangular regions are formed out of an insulator over side surfaces of the gate electrodes and of the gate wiring. The presence of these substantially triangular side walls make milder the steps at which the second wiring goes over the gate wiring. This suppresses breakage of the second wiring.

    摘要翻译: 一种半导体集成电路,包括薄膜晶体管,其中每个薄膜晶体管中的第二布线都被防止在台阶上断开。 在栅电极和从栅电极延伸的栅极布线上形成氮化硅膜。 在栅极电极和栅极布线的侧表面上形成由绝缘体构成的基本上三角形的区域。 这些基本上三角形的侧壁的存在使得第二布线越过栅极布线的步骤变得更加温和。 这抑制了第二布线的破损。

    Semiconductor integrated circuit and method of fabricating same
    9.
    发明授权
    Semiconductor integrated circuit and method of fabricating same 失效
    半导体集成电路及其制造方法

    公开(公告)号:US07528406B2

    公开(公告)日:2009-05-05

    申请号:US11526794

    申请日:2006-09-26

    IPC分类号: H01L21/00

    摘要: A semiconductor integrated circuit comprising thin-film transistors in each of which the second wiring is prevented from breaking at steps. A silicon nitride film is formed on gate electrodes and on gate wiring extending from the gate electrodes. Substantially triangular regions are formed out of an insulator over side surfaces of the gate electrodes and of the gate wiring. The presence of these substantially triangular side walls make milder the steps at which the second wiring goes over the gate wiring. This suppresses breakage of the second wiring.

    摘要翻译: 一种半导体集成电路,包括薄膜晶体管,其中每个薄膜晶体管中的第二布线都被防止在台阶上断开。 在栅电极和从栅电极延伸的栅极布线上形成氮化硅膜。 在栅极电极和栅极布线的侧表面上形成由绝缘体构成的基本上三角形的区域。 这些基本上三角形的侧壁的存在使得第二布线越过栅极布线的步骤变得更加温和。 这抑制了第二布线的破损。