公开(公告)号：US5661061A

公开(公告)日：1997-08-26

申请号：US411149

申请日：1995-03-27

申请人： Hirohisa Usuami ,  Kazuyuki Tsunokuni ,  Masayuki Kojima ,  Kazuo Nojiri ,  Keiji Okamoto

发明人： Hirohisa Usuami ,  Kazuyuki Tsunokuni ,  Masayuki Kojima ,  Kazuo Nojiri ,  Keiji Okamoto

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L27/10852 ,  H01L27/10817

摘要： A process for forming an upper-layer fin and a lower-layer fin of a storage electrode, and a semiconductor integrated circuit device fabricated by the process. When two-layered polycrystalline silicon films are to be sequentially etched to form the upper-layer fin and the lower-layer fin by the dry-etching method using a first mask, the upper polycrystalline silicon film is patterned at first so far as to form the clearance of the upper-layer fins with the minimum working size of the memory cells of a DRAM, to form the upper-layer fin. Next, the lower-layer fin is formed by the dry-etching method using a second mask which has a pattern enlarged in self-alignment from the pattern of the first mask, so that it is given a larger horizontal size than that of the upper-layer fin.

摘要翻译： 一种用于形成存储电极的上层翅片和下层翅片的方法，以及通过该方法制造的半导体集成电路器件。 当通过使用第一掩模的干蚀刻方法顺序蚀刻两层多晶硅膜以形成上层翅片和下层翅片时，首先将上多晶硅膜图案化以形成 以DRAM的存储单元的最小工作尺寸的上层翅片的间隙形成上层翅片。 接下来，通过使用具有从第一掩模的图案自对准的图案放大的图案的第二掩模的干法蚀刻法形成下层翅片，使得其具有比上部的图案更大的水平尺寸 层翅

公开(公告)号：US07397104B2

公开(公告)日：2008-07-08

申请号：US10778081

申请日：2004-02-17

申请人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

发明人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

IPC分类号： H01L21/00

CPC分类号： H01L21/76229 ,  H01L21/76224 ,  H01L21/76232 ,  H01L27/10852 ,  H01L28/91

摘要： A semiconductor integrated circuit device is provided which includes an active region, a shallow groove isolation adjacent to the active region, and a semiconductor element formed in the active region and having a gate. The sum of a width of the active region and a width of the shallow groove isolation constitutes a minimum pitch in the direction of a gate width of the gate, and the width of the active region is set larger than one-half of the minimum pitch.

摘要翻译： 提供一种半导体集成电路器件，其包括有源区，与有源区相邻的浅槽隔离，以及形成在有源区中并具有栅极的半导体元件。 有源区的宽度和浅槽隔离的宽度的和构成栅极的栅极宽度方向上的最小间距，并且有源区的宽度被设定为大于最小间距的一半 。

公开(公告)号：US06720234B2

公开(公告)日：2004-04-13

申请号：US10366423

申请日：2003-02-14

申请人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

发明人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

IPC分类号： H01L2176

CPC分类号： H01L21/76229 ,  H01L21/76224 ,  H01L21/76232 ,  H01L27/10852 ,  H01L28/91

摘要： Grooves are defined in a substrate having device isolation regions by dry etching using silicon nitride films and side wall spacers as masks. Thereafter, the side wall spacers lying on side walls of the silicon nitride films are removed and the substrate is subjected to thermal oxidation, whereby the surface of the substrate at a peripheral portion of each active region is subjected to so-called round processing so as to have a sectional shape having a convex rounded shape.

摘要翻译： 通过使用氮化硅膜和侧壁间隔物作为掩模的干蚀刻将沟槽限定在具有器件隔离区的衬底中。 此后，除去位于氮化硅膜侧壁上的侧壁隔离物，并对衬底进行热氧化，由此在每个有源区的周边部分的衬底表面进行所谓的圆形处理，以便 具有凸形圆形的截面形状。

公开(公告)号：US06562695B1

公开(公告)日：2003-05-13

申请号：US09889018

申请日：2001-07-10

申请人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

发明人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

IPC分类号： H01L2176

CPC分类号： H01L21/76229 ,  H01L21/76224 ,  H01L21/76232 ,  H01L27/10852 ,  H01L28/91

摘要： Grooves are defined in a substrate having device isolation regions by dry etching using silicon nitride films and side wall spacers as masks. Thereafter, the side wall spacers lying on side walls of the silicon nitride films are removed and the substrate is subjected to thermal oxidation, whereby the surface of the substrate at a peripheral portion of each active region is subjected to so-called round processing so as to have a sectional shape having a convex rounded shape.

摘要翻译： 通过使用氮化硅膜和侧壁间隔物作为掩模的干蚀刻将沟槽限定在具有器件隔离区的衬底中。 此后，除去位于氮化硅膜侧壁上的侧壁隔离物，并对衬底进行热氧化，由此在每个有源区的周边部分的衬底表面进行所谓的圆形处理，以便 具有凸形圆形的截面形状。

公开(公告)号：US09371744B2

公开(公告)日：2016-06-21

申请号：US12897233

申请日：2010-10-04

申请人： Norio Gouko ,  Masahiro Asano ,  Atusi Sakaida ,  Tomikazu Ishikawa ,  Keiji Okamoto

发明人： Norio Gouko ,  Masahiro Asano ,  Atusi Sakaida ,  Tomikazu Ishikawa ,  Keiji Okamoto

IPC分类号： F03C1/00 ,  F01K11/00

CPC分类号： F01K11/00

摘要： A heat engine is provided which includes: a boiler unit including an evaporation chamber and a fluid-pool chamber, the evaporation chamber heating a working fluid by supplied heat and generating vapor of the fluid, and the fluid-pool chamber collecting the fluid supplied to the evaporation chamber; an output unit through which the vapor flows, and which converts energy of the vapor to mechanical energy; a condensation unit which condenses the vapor that has passed through the output unit, and refluxes the condensed fluid to the fluid-pool chamber; and a working fluid guide member which is disposed in the boiler unit, and which sucks the fluid in the fluid-pool chamber by using capillary force and supplies the fluid to the evaporation chamber. The evaporation chamber is separated from the fluid-pool chamber. Pressure in the evaporation chamber is higher than pressure in the fluid-pool chamber. The working fluid guide member satisfies (2σ/r)·cos θ>PH−PL.

摘要翻译： 提供了一种热机，其包括：包括蒸发室和流体池室的锅炉单元，所述蒸发室通过供应热量加热工作流体并产生流体的蒸气，并且所述流体池室收集供应到 蒸发室; 蒸汽流过的输出单元，其将蒸气的能量转化为机械能; 冷凝单元，其冷凝已经通过所述输出单元的蒸气，并且将所述冷凝流体回流到所述流体池室; 以及工作流体引导构件，其设置在所述锅炉单元中，并且通过使用毛细管力吸入所述流体池室中的流体并将所述流体供应到所述蒸发室。 蒸发室与流体池分离。 蒸发室中的压力高于流体池室中的压力。 工作流体引导构件满足（2＆sgr; / r）·cos＆thetas;> PH-PL。

公开(公告)号：US08918008B2

公开(公告)日：2014-12-23

申请号：US13364498

申请日：2012-02-02

申请人： Keiji Okamoto ,  Kazuhiko Watanabe

发明人： Keiji Okamoto ,  Kazuhiko Watanabe

IPC分类号： G03G15/00 ,  G03G21/18 ,  H01R39/64 ,  G03G21/16 ,  H01R39/12

CPC分类号： H01R39/64 ,  G03G21/1652 ,  G03G21/1871 ,  H01R39/12

摘要： A connector to electrically connect a rotary body having a shaft, the connector includes a connecting terminal, electrically connected to either a power supply or ground, to contact the shaft of the rotary body either at least two points or along a line; and a posture adjuster to hold the connecting terminal to adjust the posture of one of the connecting terminal and the rotary body to maintain contact between the connecting terminal and the shaft of the rotary body.

摘要翻译： 一种用于电连接具有轴的旋转体的连接器，所述连接器包括电连接到电源或接地的连接端子，以至少两点或沿着线接触所述旋转体的轴; 以及姿势调节器，用于保持连接端子，以调节连接端子和旋转体之一的姿态，以保持连接端子与旋转体的轴之间的接触。

公开(公告)号：US08233940B2

公开(公告)日：2012-07-31

申请号：US12297116

申请日：2006-04-27

申请人： Takehiro Shimomura ,  Kuniyuki Suzuki ,  Keiji Okamoto

发明人： Takehiro Shimomura ,  Kuniyuki Suzuki ,  Keiji Okamoto

IPC分类号： H04B1/38

CPC分类号： H04W24/04 ,  H04L41/08 ,  H04L41/0803 ,  H04L41/5054 ,  H04W92/12

摘要： A technique of being capable to decrease the number of times of delivery and receipt of information on a common channel setup between a base station equipment and a base station control equipment. A communication system includes base station equipment and a base station control equipment which controls the base station equipment. The base station control equipment is capable of supplying information necessary for the common channel setup to the base station equipment, and the base station equipment produces a track-record notification signal indicating a track record of the common channel setup while performing the common channel setup on the basis of the information. The base station control equipment does not supply the information necessary for the common channel setup when receiving the track-record notification signal from the base station equipment.

摘要翻译： 能够减少在基站设备和基站控制设备之间的公共信道建立上的传送和接收信息的次数的技术。 通信系统包括基站设备和控制基站设备的基站控制设备。 基站控制设备能够向基站设备提供公共信道建立所需的信息，并且基站设备在执行公共信道建立时产生指示公共信道建立的跟踪记录的跟踪记录通知信号 信息的基础。 当从基站设备接收到跟踪记录通知信号时，基站控制设备不提供公共信道建立所需的信息。

公开(公告)号：US08182729B2

公开(公告)日：2012-05-22

申请号：US12382138

申请日：2009-03-10

申请人： Toshikazu Harada ,  Koji Kondo ,  Atusi Sakaida ,  Toshihisa Taniguchi ,  Keiji Okamoto

发明人： Toshikazu Harada ,  Koji Kondo ,  Atusi Sakaida ,  Toshihisa Taniguchi ,  Keiji Okamoto

IPC分类号： B29C65/02

CPC分类号： H05K1/0366 ,  B29C43/003 ,  B29C43/18 ,  B29C43/203 ,  B29C2043/025 ,  B32B37/185 ,  B32B2309/025 ,  B32B2457/08 ,  H05K3/4617 ,  H05K3/4632 ,  H05K2201/0129 ,  H05K2203/065 ,  H05K2203/1178

摘要： In a method of making a multilayer wiring board having a substrate and a wiring pattern formed in the substrate, base films are stacked in a predetermined direction to form a stacked film structure. Each base film includes thermoplastic resin. Pressure and heat are applied to the stacked film structure from its both sides in the stacked direction so that the base films are joined together to form the substrate. At least one of the base films is a combined film including a fiber sheet. Both sides of the fiber sheet are covered with the thermoplastic resin in such a manner that air space remains in the fiber sheet.

摘要翻译： 在制造具有基板和形成在基板中的布线图案的多层布线板的方法中，基膜沿预定方向堆叠以形成层叠膜结构。 每个基膜包括热塑性树脂。 压力和热量从层叠方向的两侧施加到层叠膜结构体上，使得基膜结合在一起形成基板。 基膜中的至少一个是包括纤维片的组合膜。 纤维片的两侧用热塑性树脂覆盖，使纤维片中残留有空气。

公开(公告)号：US20110077887A1

公开(公告)日：2011-03-31

申请号：US12990741

申请日：2009-05-14

申请人： Fumihiko Ito ,  Keiji Okamoto

发明人： Fumihiko Ito ,  Keiji Okamoto

IPC分类号： G06F19/00 ,  G01R23/16 ,  G01J3/00

CPC分类号： G01J3/2889 ,  G01J11/00 ,  H04J14/0221

摘要： Light to be measured L and sampling pulse light LSP are each split into M beams, and a time delay of 0, T, 2T, . . . , (M−1)T is given to each of the M-split sampling pulse light beams. The M-split light beams to be measured are then respectively multiplexed with M optical 90-degree hybrids, and M electrical field amplitudes per time T are determined for the light beam to be measured, based on M sets of output currents received at a balance light receiving element that receives light emitted from each of the optical 90-degree hybrids. The amplitudes of the respective wavelength optical signals contained in the light beam to be measured are calculated through Fourier transformations of the field electrical amplitudes. Pulsed light with a spectral width that covers the total frequency bandwidth of the light to be measured is used as the sampling pulse light. Where the total frequency bandwidth of the light to be measured is Δftotal, and the frequency interval of the optical signals contained in the light to be measured is Δf, T≦1/Δftotal and 1/(MT)≦Δf are set.

摘要翻译： 待测光L和采样脉冲光LSP分为M个光束，时间延迟为0，T，2T，。 。 。 ，（M-1）T被赋予每个M分割采样脉冲光束。 然后将待测量的M个分割光束分别与M个光学90度混合复用，并且基于在平衡处接收的M组输出电流来确定针对待测量的光束的每时间T的M个电场幅度 光接收元件，其接收从每个光学90度混合物发射的光。 通过场电场的傅立叶变换来计算包含在待测光束中的各波长光信号的振幅。 使用覆盖要测量的光的总频带宽的光谱宽度的脉冲光用作采样脉冲光。 要测量的光的总频率带宽为＆Dgr; ftotal，并且待测光中包含的光信号的频率间隔为＆Dgr; f，T＆nlE; 1 /＆Dgr; ftotal和1 /（MT）＆nlE ;＆Dgr; f设置。

公开(公告)号：US07701020B2

公开(公告)日：2010-04-20

申请号：US12364279

申请日：2009-02-02

申请人： Hiraku Chakihara ,  Kousuke Okuyama ,  Masahiro Moniwa ,  Makoto Mizuno ,  Keiji Okamoto ,  Mitsuhiro Noguchi ,  Tadanori Yoshida ,  Yasuhiko Takahshi ,  Akio Nishida

发明人： Hiraku Chakihara ,  Kousuke Okuyama ,  Masahiro Moniwa ,  Makoto Mizuno ,  Keiji Okamoto ,  Mitsuhiro Noguchi ,  Tadanori Yoshida ,  Yasuhiko Takahshi ,  Akio Nishida

IPC分类号： H01L27/088

CPC分类号： H01L29/6675 ,  H01L21/823885 ,  H01L27/105 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/7833 ,  H01L29/78642

摘要： Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate electrodes formed on corresponding side walls of the laminated bodies with gate insulating films interposed therebetween. In each vertical MISFET, the lower semiconductor layer constitutes a drain, the intermediate semiconductor layer constitutes a substrate (channel region), and the upper semiconductor layer constitutes a source. The lower semiconductor layer, the intermediate semiconductor layer and the upper semiconductor layer are each comprised of a silicon film. The lower semiconductor layer and the upper semiconductor layer are doped with a p type and constituted of a p type silicon film.

摘要翻译： 垂直MISFET形成在驱动MISFET和传输MISFET上。 垂直MISFET包括通过层叠下半导体层（漏极），中间半导体层和上半导体层（源极）形成的矩形柱层叠体以及在层叠体的相应侧壁上形成有栅极绝缘膜的栅电极 插入其间。 在每个垂直MISFET中，下半导体层构成漏极，中间半导体层构成衬底（沟道区），上半导体层构成源极。 下半导体层，中间半导体层和上半导体层均由硅膜构成。 下半导体层和上半导体层掺杂有p型并由p型硅膜构成。