公开(公告)号：US07903473B2

公开(公告)日：2011-03-08

申请号：US12508319

申请日：2009-07-23

申请人： Hiroki Murakami ,  Kazuhiro Kurihara

发明人： Hiroki Murakami ,  Kazuhiro Kurihara

IPC分类号： G11C16/04

CPC分类号： G11C11/413 ,  G11C16/102 ,  G11C16/105

摘要： A semiconductor device includes: a first sector (12) having data that are all to be erased and having flash memory cells; a second sector (14) having data that are all to be retained and having flash memory cells; a sector select circuit (16) selecting a pair of sectors from among sectors during erasing the data in the first sector, said pair of sectors being the first sector and the second sector; and an SRAM array (storage) (30) retaining the data of the second sector. The present invention can provide a semiconductor device in which a reduced number of sector select circuits is used so that the area of memory cell array can be reduced and provide a method of controlling the semiconductor device.

公开(公告)号：US07889577B2

公开(公告)日：2011-02-15

申请号：US12491970

申请日：2009-06-25

申请人： Hiroki Murakami ,  Kazuhiro Kurihara

发明人： Hiroki Murakami ,  Kazuhiro Kurihara

IPC分类号： G11C7/10

CPC分类号： G11C11/413 ,  G11C16/102 ,  G11C16/105

摘要： A semiconductor device includes: a first sector (12) having data that are all to be erased and having flash memory cells; a second sector (14) having data that are all to be retained and having flash memory cells; a sector select circuit (16) selecting a pair of sectors from among sectors during erasing the data in the first sector, said pair of sectors being the first sector and the second sector; and an SRAM array (storage) (30) retaining the data of the second sector. The present invention can provide a semiconductor device in which a reduced number of sector select circuits is used so that the area of memory cell array can be reduced and provide a method of controlling the semiconductor device.

摘要翻译： 一种半导体器件包括：具有全部要被擦除并具有闪存单元的数据的第一扇区（12）; 具有全部要保留并具有闪存单元的数据的第二扇区（14）; 扇区选择电路（16）在擦除第一扇区中的数据期间从扇区中选择一对扇区，所述一对扇区是第一扇区和第二扇区; 以及保持第二扇区的数据的SRAM阵列（存储）（30）。 本发明可以提供一种半导体器件，其中使用了减少数量的扇区选择电路，使得可以减小存储单元阵列的面积并提供一种控制半导体器件的方法。

公开(公告)号：US20070047369A1

公开(公告)日：2007-03-01

申请号：US11514391

申请日：2006-08-30

申请人： Hiroki Murakami ,  Kazuhiro Kurihara

发明人： Hiroki Murakami ,  Kazuhiro Kurihara

IPC分类号： G11C8/00

CPC分类号： G11C11/413 ,  G11C16/102 ,  G11C16/105

摘要： A semiconductor device includes: a first sector (12) having data that are all to be erased and having flash memory cells; a second sector (14) having data that are all to be retained and having flash memory cells; a sector select circuit (16) selecting a pair of sectors from among sectors during erasing the data in the first sector, said pair of sectors being the first sector and the second sector; and an SRAM array (storage) (30) retaining the data of the second sector. The present invention can provide a semiconductor device in which a reduced number of sector select circuits is used so that the area of memory cell array can be reduced and provide a method of controlling the semiconductor device.

摘要翻译： 一种半导体器件包括：具有全部要被擦除并具有闪存单元的数据的第一扇区（12）; 具有全部要保留并具有闪存单元的数据的第二扇区（14）; 扇区选择电路（16）在擦除第一扇区中的数据期间从扇区中选择一对扇区，所述一对扇区是第一扇区和第二扇区; 以及保持第二扇区的数据的SRAM阵列（存储）（30）。 本发明可以提供一种半导体器件，其中使用了减少数量的扇区选择电路，使得可以减小存储单元阵列的面积并提供一种控制半导体器件的方法。

公开(公告)号：US07573743B2

公开(公告)日：2009-08-11

申请号：US11514391

申请日：2006-08-30

申请人： Hiroki Murakami ,  Kazuhiro Kurihara

发明人： Hiroki Murakami ,  Kazuhiro Kurihara

IPC分类号： G11C11/34

CPC分类号： G11C11/413 ,  G11C16/102 ,  G11C16/105

摘要： A semiconductor device includes: a first sector (12) having data that are all to be erased and having flash memory cells; a second sector (14) having data that are all to be retained and having flash memory cells; a sector select circuit (16) selecting a pair of sectors from among sectors during erasing the data in the first sector, said pair of sectors being the first sector and the second sector; and an SRAM array (storage) (30) retaining the data of the second sector. The present invention can provide a semiconductor device in which a reduced number of sector select circuits is used so that the area of memory cell array can be reduced and provide a method of controlling the semiconductor device.

摘要翻译： 一种半导体器件包括：具有全部要被擦除并具有闪存单元的数据的第一扇区（12）; 具有全部要保留并具有闪存单元的数据的第二扇区（14）; 扇区选择电路（16）在擦除第一扇区中的数据期间从扇区中选择一对扇区，所述一对扇区是第一扇区和第二扇区; 以及保持第二扇区的数据的SRAM阵列（存储）（30）。 本发明可以提供一种半导体器件，其中使用了减少数量的扇区选择电路，使得可以减小存储单元阵列的面积并提供一种控制半导体器件的方法。

公开(公告)号：US09112488B2

公开(公告)日：2015-08-18

申请号：US13303153

申请日：2011-11-23

申请人： Hiroki Murakami

发明人： Hiroki Murakami

IPC分类号： G11C7/10 ,  G11C7/22 ,  G11C5/14 ,  H03K19/00 ,  G11C16/20 ,  G11C16/30

CPC分类号： H03K19/0016 ,  G11C5/147 ,  G11C5/148 ,  G11C7/1057 ,  G11C7/1084 ,  G11C7/225 ,  G11C16/20 ,  G11C16/30 ,  G11C2207/2227

摘要： A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.

摘要翻译： 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp，Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极，将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp，Tn的栅极和源极之间的电压幅度大于晶体管Tp，Tn的阈值。

公开(公告)号：US09006021B2

公开(公告)日：2015-04-14

申请号：US13094043

申请日：2011-04-26

申请人： Kazuhide Hasebe ,  Hiroki Murakami ,  Akinobu Kakimoto

发明人： Kazuhide Hasebe ,  Hiroki Murakami ,  Akinobu Kakimoto

IPC分类号： H01L21/00 ,  C23C16/24 ,  C23C16/02

CPC分类号： H01L21/76843 ,  C23C16/0272 ,  C23C16/24 ,  C23C16/52 ,  H01L21/76876

摘要： The amorphous silicon film formation method includes forming a seed layer on the surface of a base by heating the base and flowing aminosilane-based gas onto the heated base; and forming an amorphous silicon film on the seed layer by heating the base, supplying silane-based gas containing no amino group onto the seed layer on the surface of the heated base, and thermally decomposing the silane-based gas containing no amino group.

摘要翻译： 非晶硅膜形成方法包括通过加热基底并将氨基硅烷基气体流动到加热的基底上在基底的表面上形成籽晶层; 通过加热基底，在加热的基体的表面上的种子层上供给不含氨基的硅烷系气体，将不含氨基的硅烷类气体进行热分解，在种子层上形成非晶硅膜。

公开(公告)号：US08753984B2

公开(公告)日：2014-06-17

申请号：US13332691

申请日：2011-12-21

申请人： Hiroki Murakami ,  Yosuke Watanabe ,  Kazuhide Hasebe

发明人： Hiroki Murakami ,  Yosuke Watanabe ,  Kazuhide Hasebe

IPC分类号： H01L21/20

CPC分类号： C23C16/345 ,  C23C16/45525

摘要： A method of forming a silicon nitride film on the surface of an object to be processed, the method including forming a seed layer functioning as a seed of the silicon nitride film on the surface of the object to be processed by using at least an aminosilane-based gas, prior to forming the silicon nitride film on the surface of the object to be processed.

摘要翻译： 一种在待处理物体的表面上形成氮化硅膜的方法，该方法包括通过使用至少一种氨基硅烷化合物形成在待加工物体的表面上起氮化硅膜的晶种的种子层的作用， 在将待加工物体的表面上形成氮化硅膜之前。

公开(公告)号：US20140033752A1

公开(公告)日：2014-02-06

申请号：US14113025

申请日：2011-06-01

申请人： Munehisa Gunjima ,  Hiroki Murakami

发明人： Munehisa Gunjima ,  Hiroki Murakami

IPC分类号： B60H1/00

CPC分类号： B60H1/00021 ,  B60H1/00207 ,  B60H1/00371 ,  B60H1/008 ,  B60H1/00849 ,  B60H2001/00221 ,  B61D27/0072

摘要： In vehicle air-conditioning devices including a refrigerant circuit having a compressor, an outdoor heat exchanger, an expansion device, and an indoor heat exchanger that are connected by refrigerant pipes to form a refrigeration cycle; an indoor air-sending device that supplies air to the indoor heat exchanger; and an outdoor air-sending device that supplies air to the outdoor heat exchanger, the refrigerant circuit is installed under the floor of a vehicle and uses carbon dioxide as the refrigerant.

摘要翻译： 在包括具有压缩机，室外热交换器，膨胀装置和室内热交换器的制冷剂回路的车辆用空调装置中，通过制冷剂管连接而形成制冷循环; 向室内热交换器供给空气的室内送风装置; 以及向室外热交换器供给空气的室外送风装置，将制冷剂回路安装在车辆的地板下方，并使用二氧化碳作为制冷剂。

公开(公告)号：US20120287712A1

公开(公告)日：2012-11-15

申请号：US13303153

申请日：2011-11-23

申请人： Hiroki Murakami

发明人： Hiroki Murakami

IPC分类号： G11C16/04 ,  H03K19/00 ,  H03K19/20 ,  G11C5/06 ,  H03K19/096

CPC分类号： H03K19/0016 ,  G11C5/147 ,  G11C5/148 ,  G11C7/1057 ,  G11C7/1084 ,  G11C7/225 ,  G11C16/20 ,  G11C16/30 ,  G11C2207/2227

摘要： A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.

摘要翻译： 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp，Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极，将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp，Tn的栅极和源极之间的电压幅度大于晶体管Tp，Tn的阈值。

公开(公告)号：US07835667B2

公开(公告)日：2010-11-16

申请号：US12025825

申请日：2008-02-05

申请人： Shigeo Ohno ,  Tsutomu Sugimoto ,  Tomoya Ichikawa ,  Yasuo Takayama ,  Yoji Yamaguchi ,  Yoshitaka Kuroda ,  Tohru Inoue ,  Kuniaki Tanaka ,  Takahiro Shinkawa ,  Hiroki Murakami

发明人： Shigeo Ohno ,  Tsutomu Sugimoto ,  Tomoya Ichikawa ,  Yasuo Takayama ,  Yoji Yamaguchi ,  Yoshitaka Kuroda ,  Tohru Inoue ,  Kuniaki Tanaka ,  Takahiro Shinkawa ,  Hiroki Murakami

IPC分类号： G03G15/02

CPC分类号： G03G15/0291 ,  G03G2215/027

摘要： A discharger includes: a discharge electrode member that is placed opposedly to a member to be charged; an opposed electrode member that is placed opposedly to the discharge electrode member; and a power source circuit that applies a discharge voltage for generating a discharge between the discharge electrode member and the opposed electrode member, and the electrode member having a surface that includes a covered layer covered by a covering material is formed on a surface opposed thereto, and the covering material containing a carbon atom, or a carbon atom and another atom or other plural atoms as a main component, and having an SP3 structure by a carbon atom.

摘要翻译： 放电器包括：与要充电的元件相对放置的放电电极元件; 与放电电极部件相对设置的对置电极部件; 以及电源电路，其施加用于在放电电极构件和相对电极构件之间产生放电的放电电压，并且具有包括被覆盖材料覆盖的覆盖层的表面的电极构件形成在与其相对的表面上， 和含有碳原子，碳原子和其它原子或其它多个原子作为主要成分并且具有通过碳原子的SP 3结构的覆盖材料。