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公开(公告)号：US20070275488A1
公开(公告)日：2007-11-29
申请号：US10553231
申请日：2004-04-14
IPC分类号： H01L21/02
CPC分类号： H01L27/14618 , H01L27/1464 , H01L27/14683 , H01L27/14812 , H01L2224/45144 , H01L2224/48091 , H01L2924/00014 , H01L2924/00
摘要： A CCD portion 3 is formed on a front surface side of a semiconductor substrate 1. A region of a back surface side of semiconductor substrate 1 that corresponds to CCD portion 3 is thinned while leaving peripheral regions 1a of the region, and an accumulation layer 5 is formed on the back surface side of semiconductor substrate 1. An electrical wiring 7, which is electrically connected to CCD portion 3, and an electrode pad 9, which is electrically connected to electrical wiring 7, are then formed on a region 1b of the front surface side of semiconductor substrate 1 that corresponds to a peripheral region 1a, and a supporting substrate 11 is adhered onto the front surface side of semiconductor substrate 1 so as to cover CCD portion 3 while leaving electrode pad 9 exposed. Semiconductor substrate 1 and supporting substrate 11 are then cut at a thinned portion of semiconductor substrate 1 so as to leave peripheral region 1a corresponding to region 1b at which electrical wiring 7 and electrode pad 9 are formed.
摘要翻译： CCD部3形成在半导体基板1的正面侧。半导体基板1的与CCD部3对应的背面侧的区域变薄，同时留下该区域的周边区域1a，并且累积层 5形成在半导体基板1的背面侧。然后，在区域1b上形成电连接到CCD部分3的电布线7和电连接到电线7的电极焊盘9 的半导体衬底1的表面侧，并且将支撑衬底11粘附到半导体衬底1的前表面侧，以覆盖CCD部3，同时使电极焊盘9露出。 然后在半导体衬底1的薄化部分处切割半导体衬底1和支撑衬底11，以便留下对应于形成电布线7和电极焊盘9的区域1b的周边区域1a。
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公开(公告)号：US07148551B2
公开(公告)日：2006-12-12
申请号：US10262859
申请日：2002-10-03
IPC分类号： H01L31/00
CPC分类号： H01L31/103 , H01L27/14663
摘要： A semiconductor energy detector includes a semiconductor substrate comprised of a semiconductor of a first conductivity type, into which an energy ray of a predetermined wavelength range is incident from an incident surface thereof. A semiconductor energy detector includes a plurality of diffusion regions of a second conductivity type comprised of a semiconductor of a second conductivity type and a diffusion region of the first conductivity type comprised of a semiconductor of the first conductivity type higher in impurity concentration than the semiconductor substrate. The diffusion regions of a second conductivity type and the diffusion region of the first conductivity type are provided on a surface opposite to the incident surface of said semiconductor substrate. Each first conductivity type semiconductor substrate side of pn junctions, formed at the area of interface between the semiconductor substrate and each of the diffusion regions of the second conductivity type, is commonly connected.
摘要翻译： 半导体能量检测器包括由第一导电类型的半导体构成的半导体衬底，预定波长范围的能量射线从入射表面入射到该半导体衬底。 半导体能量检测器包括由第二导电类型的半导体构成的第二导电类型的多个扩散区域和由比半导体衬底的杂质浓度高的第一导电类型的半导体构成的第一导电类型的扩散区域 。 第二导电类型的扩散区域和第一导电类型的扩散区域设置在与所述半导体衬底的入射表面相对的表面上。 形成在半导体衬底和第二导电类型的每个扩散区之间的界面区域的pn结的每个第一导电类型半导体衬底侧通常连接。
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公开(公告)号：US06204506B1
公开(公告)日：2001-03-20
申请号：US09092014
申请日：1998-06-04
IPC分类号： H01L2978
CPC分类号： H01L31/02002 , H01L27/1464 , H01L27/14806 , H01L27/14831 , H01L2224/45144 , H01L2224/48091 , H01L2224/48465 , H01L2924/00014 , H01L2924/00
摘要： An n-type buried channel, a silicon oxide film, a poly-Si transfer electrode, a PSG film as an insulating interlayer, an aluminum interconnection, and a silicon nitride film are stacked on one surface of a p-type silicon substrate to form a CCD. The other surface is protected by a silicon oxide film, and a p+-type accumulation layer is formed on the silicon oxide film, thereby forming a back-illuminated CCD on which light, electromagnetic wave, charged particles, or the like is incident through the other surface. A glass substrate is anodically bonded on the CCD via an insulating polyimide film, and a conductive aluminum film. Therefore, the mechanical strength of the device is kept high, and the sensitivity can be increased by thinning the silicon substrate.
摘要翻译： 在p型硅衬底的一个表面上堆叠n型掩埋沟道，氧化硅膜，多晶硅转移电极，作为绝缘中间层的PSG膜，铝互连和氮化硅膜，以形成 一个CCD。 另一个表面由氧化硅膜保护，并且在氧化硅膜上形成p +型蓄积层，从而形成背光照明的CCD，其中光，电磁波，带电粒子等通过 其他表面。 玻璃基板通过绝缘聚酰亚胺膜和导电铝膜阳极结合在CCD上。 因此，器件的机械强度保持较高，并且可以通过使硅衬底变薄来增加灵敏度。
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4.发明授权
公开(公告)号：US6031274A
公开(公告)日：2000-02-29
申请号：US948822
申请日：1997-10-10
IPC分类号： H01L27/148 , H01L27/14 , H01L27/146 , H01L31/0224 , H01L31/112 , H01L31/00
CPC分类号： H01L31/022408 , H01L31/1125
摘要： A back irradiation type light-receiving device, on which light is incident from the back side with respect to a charge-reading section of a semiconductor thin plate, is provided with a reinforcement member on the charge-reading section side. Electric signals are fed in and out from the charge-reading section by way of a polysilicon lead having a short wiring length and a low-resistance aluminum lead which is formed, after the completion of all the steps requiring a high-temperature treatment, so as to be physically and electrically direct-connected to the polysilicon lead. Accordingly, a charge generated in response to the received light can be read out with a high efficiency, while enabling a high-speed operation.
摘要翻译： 从相对于半导体薄板的电荷读取部的背面入射光的背照射型光接收装置在电荷读取部侧具有加强部件。 电信号通过具有短布线长度的多晶硅引线和形成的低电阻铝导线从电荷读取部分馈送出来，在完成所有需要高温处理的步骤之后，因此 以物理和电气方式直接连接到多晶硅引线。 因此，能够高效率地读取响应于接收到的光而产生的电荷，同时能够进行高速操作。
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公开(公告)号：US20070064134A1
公开(公告)日：2007-03-22
申请号：US10554106
申请日：2004-04-14
IPC分类号： H04N5/335
CPC分类号： H04N5/378 , H01L27/14618 , H01L2224/48091 , H01L2924/1305 , H01L2924/15787 , H01L2924/19105 , H04N5/335 , H01L2924/05432 , H01L2924/00014 , H01L2924/00
摘要： A solid-state imaging apparatuses IS1 comprises a package P1, a CCD chip 11, chip resistor arrays 21, etc. In package P1, a mounting portion 2, for mounting CCD chip 11 and chip resistor arrays 21, is disposed so as to protrude into a hollow portion 1. Mounting portion 2 has a first planar portion 3 and second planar portions 4, and first planar portion 3and second planar portions 4 are formed to be stepped with respect to each other. CCD chip 11 is mounted and fixed on first planar portion 3via a spacer 13. Chip resistor arrays 21 are mounted and fixed on second planar portions 4. Using the step difference between first planar portion 3 and second planar portions 4, CCD chip 11 and chip resistor arrays 21 are positioned proximally.
摘要翻译： 固态成像装置IS 1包括封装P 1，CCD芯片11，芯片电阻阵列21等。在封装P 1中，安装CCD芯片11和芯片电阻器阵列21的安装部分2被布置为 突出到中空部分1中。 安装部分2具有第一平面部分3和第二平面部分4，并且第一平面部分3和第二平面部分4形成为相对于彼此阶梯状。 CCD芯片11通过间隔件13安装并固定在第一平面部分3上。 芯片电阻器阵列21安装并固定在第二平面部分4上。 使用第一平面部分3和第二平面部分4之间的阶差，CCD芯片11和芯片电阻器阵列21位于近侧。
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公开(公告)号：US07556975B2
公开(公告)日：2009-07-07
申请号：US10553231
申请日：2004-04-14
IPC分类号： H01L21/02
CPC分类号： H01L27/14618 , H01L27/1464 , H01L27/14683 , H01L27/14812 , H01L2224/45144 , H01L2224/48091 , H01L2924/00014 , H01L2924/00
摘要： A CCD portion 3 is formed on a front surface side of a semiconductor substrate 1. A region of a back surface side of semiconductor substrate 1 that corresponds to CCD portion 3 is thinned while leaving peripheral regions 1a of the region, and an accumulation layer 5 is formed on the back surface side of semiconductor substrate 1. An electrical wiring 7, which is electrically connected to CCD portion 3, and an electrode pad 9, which is electrically connected to electrical wiring 7, are then formed on a region 1b of the front surface side of semiconductor substrate 1 that corresponds to a peripheral region 1a, and a supporting substrate 11 is adhered onto the front surface side of semiconductor substrate 1 so as to cover CCD portion 3 while leaving electrode pad 9 exposed. Semiconductor substrate 1 and supporting substrate 11 are then cut at a thinned portion of semiconductor substrate 1 so as to leave peripheral region 1a corresponding to region 1b at which electrical wiring 7 and electrode pad 9 are formed.
摘要翻译： CCD部3形成在半导体基板1的表面侧。半导体基板1的与CCD部3对应的背面侧的区域变薄，同时留下该区域的周边区域1a，并且累积层5 形成在半导体基板1的背面侧上。与CCD部分3电连接的电线7和电连接到电线7的电极焊盘9然后形成在 对应于周边区域1a的半导体基板1的前表面侧，并且将支撑基板11粘附到半导体基板1的前表面侧，以便覆盖CCD部分3，同时使电极焊盘9暴露。 然后在半导体衬底1的薄化部分切割半导体衬底1和支撑衬底11，以便留下对应于形成电线7和电极焊盘9的区域1b的周边区域1a。
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公开(公告)号：US08243175B2
公开(公告)日：2012-08-14
申请号：US10554106
申请日：2004-04-14
CPC分类号： H04N5/378 , H01L27/14618 , H01L2224/48091 , H01L2924/1305 , H01L2924/15787 , H01L2924/19105 , H04N5/335 , H01L2924/05432 , H01L2924/00014 , H01L2924/00
摘要： A solid-state imaging apparatuses IS1 comprises a package P1, a CCD chip 11, chip resistor arrays 21, etc. In package P1, a mounting portion 2, for mounting CCD chip 11 and chip resistor arrays 21, is disposed so as to protrude into a hollow portion 1. Mounting portion 2 has a first planar portion 3 and second planar portions 4, and first planar portion 3 and second planar portions 4 are formed to be stepped with respect to each other. CCD chip 11 is mounted and fixed on first planar portion 3 via a spacer 13. Chip resistor arrays 21 are mounted and fixed on second planar portions 4. Using the step difference between first planar portion 3 and second planar portions 4, CCD chip 11 and chip resistor arrays 21 are positioned proximally.
摘要翻译： 固态成像装置IS1包括封装P1，CCD芯片11，芯片电阻器阵列21等。在封装P1中，安装CCD芯片11和芯片电阻器阵列21的安装部分2被设置成突出 成为中空部1.安装部2具有第一平面部3和第二平面部4，第一平面部3和第二平面部4相对于彼此成台阶地形成。 CCD芯片11通过间隔件13安装并固定在第一平面部分3上。芯片电阻器阵列21安装并固定在第二平面部分4上。使用第一平面部分3和第二平面部分4之间的步进差，CCD芯片11和 芯片电阻器阵列21位于近侧。
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公开(公告)号：US06724062B2
公开(公告)日：2004-04-20
申请号：US09886110
申请日：2001-06-22
IPC分类号： H01L3100
CPC分类号： H01L27/14812
摘要： A semiconductor energy detector as disclosed herein is arranged so that an aluminum wiring pattern is formed on the front side of transfer electrodes of a CCD vertical shift register, which pattern includes meander-shaped auxiliary wirings for performing auxiliary application/supplement and additional wirings for performing auxiliary supplement of transfer voltages in a way independent of the auxiliary wirings with respective ones of such wirings being connected to corresponding transfer electrodes to thereby avoid a problem as to lead resistivities at those transfer electrodes made of polycrystalline silicon, thus achieving the intended charge transfer at high speeds with high efficiency.
摘要翻译： 这里所公开的一种半导体能量检测器被布置成在CCD垂直移位寄存器的传输电极的正面上形成铝布线图形，该垂直移位寄存器的图形包括用于执行辅助应用/补充的曲折辅助布线和用于执行的附加布线 以与辅助布线无关的方式辅助补偿传输电压，其中相应的这些布线连接到相应的传输电极，从而避免在由多晶硅制成的那些传输电极处的引线电阻的问题，从而实现预期的电荷转移 高速高效率。
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公开(公告)号：US06541753B2
公开(公告)日：2003-04-01
申请号：US09845204
申请日：2001-05-01
IPC分类号： H01L3100
CPC分类号： H01L27/14856 , H01L27/14601 , H01L27/1464 , H01L27/14806 , H01L27/14812
摘要： A substrate beam 1b is formed so as to divide a membrane for enabling detection of an energy ray upon back illumination, there by suppressing distortion of the membrane and preventing defocus upon detection due to the distortion, or the like. The distance is set sufficiently short from each region of the membrane to a substrate frame or to the substrate beam, thereby decreasing substrate resistance and enabling high-speed reading operation.
摘要翻译： 形成基板光束1b，以便在背光照射时能够分离膜，以便能够在背照射下检测能量射线，通过抑制膜的变形并防止由于变形等而在检测时的散焦。 该距离被设定为从薄膜的每个区域到基板框架或基板光束足够短，从而降低基板电阻并实现高速读取操作。
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公开(公告)号：US20120018780A1
公开(公告)日：2012-01-26
申请号：US13075665
申请日：2011-03-30
申请人： Kazuaki Iwasawa , Shigeo Kondo , Hiroshi Akahori , Kiyohito Nishihara , Yingkang Zhang , Masaki Kondo , Hidenobu Nagashima , Takashi Ichikawa
发明人： Kazuaki Iwasawa , Shigeo Kondo , Hiroshi Akahori , Kiyohito Nishihara , Yingkang Zhang , Masaki Kondo , Hidenobu Nagashima , Takashi Ichikawa
IPC分类号： H01L29/772 , H01L21/28
CPC分类号： H01L27/11521
摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided via a gate insulating film above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a protection film covering the side face of the gate electrode. The method can include etching the semiconductor substrate using the gate electrode as a mask to form the isolation groove. The side face of the gate electrode is covered with the protection film. The method can include forming a first insulating film by oxidizing a surface of the isolation groove to fill a bottom portion of the isolation groove. In addition, the method can include forming a second insulating film on the first insulating film to fill an upper portion of the isolation groove including the side face of the gate electrode.
摘要翻译： 根据一个实施例，公开了一种用于制造半导体器件的方法。 作为设置在相邻栅电极之间的隔离槽的内壁的一部分，包括平行于通过半导体基板上方的栅极绝缘膜设置的多个栅电极的沟道方向的侧面。 该方法可以包括形成覆盖栅电极的侧面的保护膜。 该方法可以包括使用栅电极作为掩模来蚀刻半导体衬底以形成隔离槽。 栅电极的侧面被保护膜覆盖。 该方法可以包括通过氧化隔离槽的表面来填充隔离槽的底部来形成第一绝缘膜。 此外，该方法可以包括在第一绝缘膜上形成第二绝缘膜以填充包括栅电极的侧面的隔离槽的上部。
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