Data processor and program for processing a data matrix
    1.
    发明授权
    Data processor and program for processing a data matrix 有权
    用于处理数据矩阵的数据处理器和程序

    公开(公告)号:US07315934B2

    公开(公告)日:2008-01-01

    申请号:US10377328

    申请日:2003-02-28

    IPC分类号: G06F15/76

    摘要: A data processor has sixteen processing elements that each include a register file and an arithmetic logic unit. A network unit connects between the register files of the processing elements and the arithmetic logic units of the processing elements. The network unit has a selector for simultaneously performing a plurality of data transfers which are each made from a register file of one processing element to an operation unit of another processing element. With the provision of this selector that can perform such simultaneous data transfers, the processing efficiency of the processing elements can be maintained even if a change occurs in operand assignments and the like.

    摘要翻译: 数据处理器具有16个处理元件,每个处理元件包括寄存器文件和算术逻辑单元。 网络单元连接处理元件的寄存器文件和处理元件的算术逻辑单元。 网络单元具有选择器,用于同时执行多个数据传送,每个数据传输由一个处理元件的寄存器文件制成到另一个处理元件的操作单元。 通过提供可以执行这种同时数据传输的该选择器,即使在操作数分配等中发生改变,也可以保持处理元件的处理效率。

    TRANSPARENT HEAT RADIATING COATING COMPOSITION
    2.
    发明申请
    TRANSPARENT HEAT RADIATING COATING COMPOSITION 有权
    透明散热涂料组合物

    公开(公告)号:US20130072617A1

    公开(公告)日:2013-03-21

    申请号:US13583581

    申请日:2011-01-14

    摘要: The present invention provides a transparent heat radiating coating composition capable of forming a coating layer having excellent transparency and heat radiating properties. The transparent heat radiating coating composition of the present invention is a transparent heat radiating coating composition including a binder resin, a hydrotalcite-series compound and a resin dispersant with an amine value of 0 to 90 mgKOH/g, wherein the transparent heat radiating coating composition includes 50 to 290 parts by weight of the hydrotalcite-series compound based on 100 parts by weight of the binder resin.

    摘要翻译: 本发明提供一种能够形成透明性和散热性优异的涂层的透明散热涂料组合物。 本发明的透明散热用涂料组合物是包含粘合剂树脂,水滑石系列化合物和胺值为0​​至90mgKOH / g的树脂分散剂的透明散热涂料组合物,其中透明散热涂料组合物 基于100重量份的粘合剂树脂,包含50〜290重量份的水滑石系列化合物。

    Antenna unit having improved antenna radiation characteristics
    3.
    发明授权
    Antenna unit having improved antenna radiation characteristics 失效
    具有改善的天线辐射特性的天线单元

    公开(公告)号:US07586461B2

    公开(公告)日:2009-09-08

    申请号:US11412547

    申请日:2006-04-27

    IPC分类号: H01Q1/36

    摘要: An antenna unit comprises a hollow cylindrical member obtained by forming a flexible insulating film member into a hollow cylinder about a center axis and an antenna pattern composed of a plurality of conductors formed on a peripheral surface of the hollow cylindrical member. The antenna pattern comprises a helical pattern extending helically in a direction of the center axis and a loop pattern connected to an end portion of the helical pattern at an upper end portion of the hollow cylindrical member.

    摘要翻译: 天线单元包括通过将柔性绝缘膜构件围绕中心轴形成为中空圆筒而获得的中空圆柱形构件和由形成在中空圆柱形构件的圆周表面上的多个导体构成的天线图案。 天线图案包括在中心轴线的方向上螺旋状延伸的螺旋图案和在中空圆柱形构件的上端部处连接到螺旋图案的端部的环形图案。

    Wideband antenna unit
    4.
    发明申请
    Wideband antenna unit 审中-公开
    宽带天线单元

    公开(公告)号:US20090058732A1

    公开(公告)日:2009-03-05

    申请号:US11988581

    申请日:2006-03-02

    IPC分类号: H01Q9/04

    CPC分类号: H01Q9/40 H01Q1/48 H01Q9/30

    摘要: To provide a thin wideband antenna unit capable of shrinking the size of a radiation element in a case where a dielectric is not used.In a wideband antenna unit 10 having a ground plate 12 and a flat shaped radiation element 14 disposed on a plane (x, y) flush with a plane where the ground plate extends, the radiation element 14 has an elliptically shape. The radiation element 14 and the ground plate 12 are apart from each other by a predetermined feeding distance ΔFD. A ratio between an outside diameter 2aout in an ellipse's x-direction and an outside diameter 2bout in an ellipse's y-direction is 8:5. The elliptically shaped radiation element 14 has an elliptically shaped opening 14a which is concentric O with the elliptically shape. An inside diameter 2bin in the ellipse's y-direction is half of an outside diameter 2bout in the ellipse's y-direction. It is desirable that an inside diameter 2ain of the elliptically shaped opening 14a in the ellipse's x-direction is not more than half of the outside diameter 2aout in the ellipse's x-direction.

    摘要翻译: 为了提供在不使用电介质的情况下能够收缩辐射元件的尺寸的薄宽带天线单元。 在具有接地板12和设置在与接地板延伸的平面齐平的平面(x,y)上的平坦形状的辐射元件14的宽带天线单元10中,辐射元件14具有椭圆形。 辐射元件14和接地板12彼此隔开预定的馈送距离ΔFD。 椭圆x方向的外径2aout与椭圆y方向的外径2bo之间的比例为8:5。 椭圆形辐射元件14具有椭圆形的开口14a,其与椭圆形状同心O。 椭圆y方向的内径2bin是椭圆y方向的外径2bo的一半。 希望椭圆形x方向上的椭圆形开口14a的内径2ain不大于椭圆x方向上的外径2aout的一半。

    Antenna unit having a single antenna element and a periodic structure upper plate
    5.
    发明授权
    Antenna unit having a single antenna element and a periodic structure upper plate 失效
    具有单个天线元件和周期性结构上板的天线单元

    公开(公告)号:US07463213B2

    公开(公告)日:2008-12-09

    申请号:US11699815

    申请日:2007-01-30

    IPC分类号: H01Q15/02 H01Q1/38

    摘要: An antenna unit consists of an EBG reflector, a single curl antenna supported at a central portion of the EBG reflector, and a periodic structure upper plate disposed apart from a principal surface of the EBG reflector by a predetermined distance. The EBG reflector includes a substrate having the principal surface and (Nx×Ny) square patches which are printed on the principle surface of the substrate and which are arranged in a matrix fashion (lattice structure). The periodic structure upper plate consists of a film and (Nx×Ny) square patch-like conductors printed on the film. The (Nx×Ny) square patch-like conductors are disposed so as to oppose to the (Nx×Ny) square patches, respectively.

    摘要翻译: 天线单元包括EBG反射器,支撑在EBG反射器的中心部分的单个卷曲天线以及与EBG反射器的主表面分开预定距离的周期性结构上板。 EBG反射器包括具有主表面的衬底和(NxxNy)个正方形贴片,印刷在衬底的主表面上并且以矩阵方式排列(晶格结构)。 周期性结构上板由薄膜和印在薄膜上的(NxxNy)方形贴片状导体组成。 (NxxNy)方形片状导体分别设置成与(NxxNy)个正方形块相对。

    Scan path circuit and semiconductor integrated circuit comprising the scan path circuit
    6.
    发明申请
    Scan path circuit and semiconductor integrated circuit comprising the scan path circuit 有权
    扫描路径电路和包括扫描路径电路的半导体集成电路

    公开(公告)号:US20070168806A1

    公开(公告)日:2007-07-19

    申请号:US11506781

    申请日:2006-08-21

    IPC分类号: G01R31/28

    CPC分类号: G11C29/32 G11C2029/3202

    摘要: Each of D flip-flops (FFs) 13a to 13f constituting a scan path circuit has a normal operation input circuit to be selected in a normal operation and a test operation input circuit to be selected in a test operation, and a control signal having an intermediate voltage between a supply voltage and a ground voltage is sent from a voltage generating circuit 17 to the test operation input circuit of each FF in the test operation. In this case, the amount of an output change in data in each FF is smoother than that in the case in which the supply voltage is applied. Consequently, the delay time of the data is increased. The intermediate voltage to be applied to each FF in the test operation is determined based on a feedback signal sent from a test circuit 15 for checking whether scanned-out data have an error or not.

    摘要翻译: 构成扫描路径电路的D触发器(FF)13a至13f中的每一个具有在正常操作中选择的正常操作输入电路和在测试操作中选择的测试操作输入电路,以及控制信号 在电源电压和接地电压之间具有中间电压的电压从电压产生电路17发送到测试操作中的每个FF的测试操作输入电路。 在这种情况下,每个FF中的数据的输出变化量比施加电源电压的情况更平滑。 因此,数据的延迟时间增加。 基于从测试电路15发送的用于检查扫描数据是否具有错误的反馈信号来确定在测试操作中施加到每个FF的中间电压。

    Scan path circuit and semiconductor integrated circuit comprising the scan path circuit
    7.
    发明授权
    Scan path circuit and semiconductor integrated circuit comprising the scan path circuit 有权
    扫描路径电路和包括扫描路径电路的半导体集成电路

    公开(公告)号:US07124339B2

    公开(公告)日:2006-10-17

    申请号:US10417208

    申请日:2003-04-17

    IPC分类号: G01R31/028 H03K3/289

    CPC分类号: G11C29/32 G11C2029/3202

    摘要: Each of D flip-flops (FFs) 13a to 13f constituting a scan path circuit has a normal operation input circuit to be selected in a normal operation and a test operation input circuit to be selected in a test operation, and a control signal having an intermediate voltage between a supply voltage and a ground voltage is sent from a voltage generating circuit 17 to the test operation input circuit of each FF in the test operation. In this case, the amount of an output change in data in each FF is smoother than that in the case in which the supply voltage is applied. Consequently, the delay time of the data is increased. The intermediate voltage to be applied to each FF in the test operation is determined based on a feedback signal sent from a test circuit 15 for checking whether scanned-out data have an error or not.

    摘要翻译: 构成扫描路径电路的D触发器(FF)13a至13f中的每一个具有在正常操作中选择的正常操作输入电路和在测试操作中选择的测试操作输入电路,以及控制信号 在电源电压和接地电压之间具有中间电压的电压从电压产生电路17发送到测试操作中的每个FF的测试操作输入电路。 在这种情况下,每个FF中的数据的输出变化量比施加电源电压的情况更平滑。 因此,数据的延迟时间增加。 基于从测试电路15发送的用于检查扫描数据是否具有错误的反馈信号来确定在测试操作中施加到每个FF的中间电压。

    Four-point loop antenna into which a matching circuit is integrated
    9.
    发明授权
    Four-point loop antenna into which a matching circuit is integrated 失效
    集成有匹配电路的四点环形天线

    公开(公告)号:US06563469B2

    公开(公告)日:2003-05-13

    申请号:US10032935

    申请日:2001-12-27

    IPC分类号: H01Q1112

    CPC分类号: H01Q1/38 H01Q7/00

    摘要: In order to feed at four points to a loop portion (12) made of conductor formed around a central axis (O) in a loop fashion along a peripheral surface of a cylindrical body (11) formed by rounding a flexible insulator film member (20) around the central axis in a cylindrical fashion, each of four feeders (13) formed on the peripheral surface of the cylindrical body comprises a vertical feeding portion (131) having one end (131a) grounded and another end (131b) extending toward the loop portion, a zigzag line (132) disposed between the other end of the vertical feeding portion and the loop portion, a tap (133) for feeding from a feeding terminal (13a) to the vertical feeding portion.

    摘要翻译: 为了将四点馈送到由围绕中心轴线(O)形成的导体制成的环形部分(12),该环形部分沿着圆形主体(11)的圆周表面以环形方式形成,所述圆柱形主体(11)通过使柔性绝缘膜构件(20 )围绕中心轴以圆柱形方式围绕,形成在圆柱形主体的圆周表面上的四个进给器(13)中的每一个包括具有一端(131a)接地的垂直进给部分(131),另一端(131b)朝向 设置在垂直进给部分的另一端和环部分之间的之字形线(132),用于从馈送端子(13a)馈送到垂直馈送部分的抽头(133)。

    Control circuit for controlling a cache memory divided into a plurality
of banks
    10.
    发明授权
    Control circuit for controlling a cache memory divided into a plurality of banks 失效
    控制电路,用于控制分成多个存储体的高速缓存存储器

    公开(公告)号:US5497473A

    公开(公告)日:1996-03-05

    申请号:US90931

    申请日:1993-07-14

    IPC分类号: G06F12/08 G06F12/02

    CPC分类号: G06F12/0846

    摘要: A signal cache memory controller which includes line for inputting an index section of an address is formed with a branch line which is intervened by an address delay circuit. In each of banks X and Y, a switching circuit selects the data which has been delayed in response to a select signal Sse being outputted as a cache-access address to be outputted to a tag memory. An address comparator compares a tag section of the address input through a signal line for inputting the tag section with a reference address output from the tag memory and outputs an coincidence signal if there is a coincidence therebetween. When the coincidence signal is generated and the select signal Sse is not generated, a bank-hit signal generating circuit generated a bank-hit signal Sbh, in response to which a select-signal generating circuit generates the select signal Sse. The circuit for controlling a cache memory which is divided into a plurality of banks enables the writing of data in the cache in every cycle.

    摘要翻译: 包括用于输入地址的索引部分的行的信号高速缓冲存储器控制器形成有由地址延迟电路干预的分支线。 在每个存储体X和Y中,切换电路选择响应于输出的选择信号Sse被延迟的数据作为要输出到标签存储器的高速缓存访​​问地址。 地址比较器将通过用于输入标签部分的信号线输入的地址的标签部分与从标签存储器输出的参考地址进行比较,并且如果它们之间存在一致,则输出一致信号。 当产生符合信号并且不产生选择信号Sse时,存储体命中信号发生电路产生一个选通信号产生电路产生选择信号Sse的存储体命中信号Sbh。 用于控制被分成多个存储体的高速缓冲存储器的电路使得能够在每个周期中在高速缓存中写入数据。