公开(公告)号：US07439111B2

公开(公告)日：2008-10-21

申请号：US11221767

申请日：2005-09-09

申请人： Hisashi Ohtani ,  Koji Moriya ,  Masayuki Sakakura ,  Hideto Ohnuma

发明人： Hisashi Ohtani ,  Koji Moriya ,  Masayuki Sakakura ,  Hideto Ohnuma

IPC分类号： H01L21/336 ,  H01L21/84

CPC分类号： H01L27/1248 ,  H01L27/1214

摘要： An object of the invention is to form an insulating film having favorable insulation and planarity. An insulating film is formed by performing heat treatment a resin containing a siloxane polymer after application, in an atmosphere including an inert gas as its main component and having an oxygen concentration of 5% or less and a water concentration of 1% or less. Preferably, an oxygen concentration is 1% or less and a water concentration is 0.1% or less. The resin containing a siloxane polymer includes a methyl group and a phenyl group. Further, the inert gas is nitrogen.

摘要翻译： 本发明的目的是形成具有良好绝缘性和平坦性的绝缘膜。 通过在包含惰性气体为主要成分并且氧浓度为5％以下，水浓度为1％以下的气氛中，对涂布后的含有硅氧烷聚合物的树脂进行热处理而形成绝缘膜。 氧浓度优选为1％以下，水浓度为0.1％以下。 含有硅氧烷聚合物的树脂包括甲基和苯基。 此外，惰性气体是氮气。

公开(公告)号：US20060079039A1

公开(公告)日：2006-04-13

申请号：US11221767

申请日：2005-09-09

申请人： Hisashi Ohtani ,  Koji Moriya ,  Masayuki Sakakura ,  Hideto Ohnuma

发明人： Hisashi Ohtani ,  Koji Moriya ,  Masayuki Sakakura ,  Hideto Ohnuma

IPC分类号： H01L21/84

CPC分类号： H01L27/1248 ,  H01L27/1214

摘要： An object of the invention is to form an insulating film having favorable insulation and planarity. An insulating film is formed by performing heat treatment a resin containing a siloxane polymer after application, in an atmosphere including an inert gas as its main component and having an oxygen concentration of 5% or less and a water concentration of 1% or less. Preferably, an oxygen concentration is 1% or less and a water concentration is 0.1% or less. The resin containing a siloxane polymer includes a methyl group and a phenyl group. Further, the inert gas is nitrogen.

摘要翻译： 本发明的目的是形成具有良好绝缘性和平坦性的绝缘膜。 通过在包含惰性气体为主要成分并且氧浓度为5％以下，水浓度为1％以下的气氛中，对涂布后的含有硅氧烷聚合物的树脂进行热处理而形成绝缘膜。 氧浓度优选为1％以下，水浓度为0.1％以下。 含有硅氧烷聚合物的树脂包括甲基和苯基。 此外，惰性气体是氮气。

公开(公告)号：US07947538B2

公开(公告)日：2011-05-24

申请号：US12534176

申请日：2009-08-03

申请人： Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori ,  Shunpei Yamazaki

发明人： Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori ,  Shunpei Yamazaki

IPC分类号： H01L21/00

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1288 ,  H01L27/14623 ,  H01L27/3244 ,  H01L29/78645

摘要： It is an object of the present invention to form a plurality of elements in a limited area to reduce the area occupied by the elements for integration so that further higher resolution (increase in number of pixels), reduction of each display pixel pitch with miniaturization, and integration of a driver circuit that drives a pixel portion can be advanced in semiconductor devices such as liquid crystal display devices and light-emitting devices that has EL elements. A photomask or a reticle provided with an assist pattern that is composed of a diffraction grating pattern or a semi-transparent film and has a function of reducing a light intensity is applied to a photolithography process for forming a gate electrode to form a complicated gate electrode. In addition, a top-gate TFT that has the multi-gate structure described above and a top gate TFT that has a single-gate structure can be formed on the same substrate just by changing the mask without increasing the number of processes.

摘要翻译： 本发明的目的是在有限的区域中形成多个元件，以减少用于积分的元件所占据的面积，从而进一步提高分辨率（增加像素数），减小每个显示像素间距，同时小型化， 并且驱动像素部分的驱动电路的集成可以在具有EL元件的液晶显示装置和发光装置等半导体装置中进行。 将具有由衍射光栅图案或半透明膜构成的辅助图案的光掩模或掩模版施加到用于形成栅电极的光刻工艺以形成复杂的栅电极 。 此外，只要通过改变掩模而不增加处理次数，就可以在同一基板上形成具有上述多栅结构的顶栅TFT和具有单栅结构的顶栅TFT。

公开(公告)号：US20090291536A1

公开(公告)日：2009-11-26

申请号：US12534176

申请日：2009-08-03

申请人： Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori ,  Shunpei Yamazaki

发明人： Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori ,  Shunpei Yamazaki

IPC分类号： H01L21/336

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1288 ,  H01L27/14623 ,  H01L27/3244 ,  H01L29/78645

摘要： It is an object of the present invention to form a plurality of elements in a limited area to reduce the area occupied by the elements for integration so that further higher resolution (increase in number of pixels), reduction of each display pixel pitch with miniaturization, and integration of a driver circuit that drives a pixel portion can be advanced in semiconductor devices such as liquid crystal display devices and light-emitting devices that has EL elements. A photomask or a reticle provided with an assist pattern that is composed of a diffraction grating pattern or a semi-transparent film and has a function of reducing a light intensity is applied to a photolithography process for forming a gate electrode to form a complicated gate electrode. In addition, a top-gate TFT that has the multi-gate structure described above and a top gate TFT that has a single-gate structure can be formed on the same substrate just by changing the mask without increasing the number of processes.

摘要翻译： 本发明的目的是在有限的区域中形成多个元件，以减少用于积分的元件所占据的面积，从而进一步提高分辨率（增加像素数），减小每个显示像素间距，同时小型化， 并且驱动像素部分的驱动电路的集成可以在具有EL元件的液晶显示装置和发光装置等半导体装置中进行。 将具有由衍射光栅图案或半透明膜构成的辅助图案的光掩模或掩模版施加到用于形成栅电极的光刻工艺以形成复杂的栅电极 。 此外，只要通过改变掩模而不增加处理次数，就可以在同一基板上形成具有上述多栅结构的顶栅TFT和具有单栅结构的顶栅TFT。

公开(公告)号：US07608490B2

公开(公告)日：2009-10-27

申请号：US11440175

申请日：2006-05-25

申请人： Shunpei Yamazaki ,  Tetsuya Kakehata ,  Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori

发明人： Shunpei Yamazaki ,  Tetsuya Kakehata ,  Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori

IPC分类号： H01L21/00

CPC分类号： H01L21/02683 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/02686 ,  H01L21/2026 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1285 ,  H01L27/1288

摘要： To provide a semiconductor device having a circuit with high operating performance and high reliability, and improve the reliability of the semiconductor device, thereby improving the reliability of an electronic device having the same. The aforementioned object is achieved by combining a step of crystallizing a semiconductor layer by irradiation with continuous wave laser beams or pulsed laser beams with a repetition rate of 10 MHz or more, while scanning in one direction; a step of photolithography with the use of a photomask or a leticle including an auxiliary pattern which is formed of a diffraction grating pattern or a semi-transmissive film having a function of reducing the light intensity; and a step of performing oxidation, nitridation, or surface-modification to the surface of the semiconductor film, an insulating film, or a conductive film, with high-density plasma with a low electron temperature.

摘要翻译： 为了提供具有高操作性能和高可靠性的电路的半导体器件，并且提高了半导体器件的可靠性，从而提高了具有该半导体器件的电子器件的可靠性。 上述目的是通过在沿一个方向扫描的同时，通过照射连续波激光束或重复频率为10MHz或更高的脉冲激光束来结合半导体层结晶步骤来实现的; 使用光掩模或包含由衍射光栅图案形成的辅助图案或具有降低光强度功能的半透射膜的吸收体的光刻步骤; 以及对具有低电子温度的高密度等离子体对半导体膜，绝缘膜或导电膜的表面进行氧化，氮化或表面改性的步骤。

公开(公告)号：US07579220B2

公开(公告)日：2009-08-25

申请号：US11383694

申请日：2006-05-16

申请人： Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori ,  Shunpei Yamazaki

发明人： Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori ,  Shunpei Yamazaki

IPC分类号： H01L21/00

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1288 ,  H01L27/14623 ,  H01L27/3244 ,  H01L29/78645

摘要： It is an object of the present invention to form a plurality of elements in a limited area to reduce the area occupied by the elements for integration so that further higher resolution (increase in number of pixels), reduction of each display pixel pitch with miniaturization, and integration of a driver circuit that drives a pixel portion can be advanced in semiconductor devices such as liquid crystal display devices and light-emitting devices that has EL elements. A photomask or a reticle provided with an assist pattern that is composed of a diffraction grating pattern or a semi-transparent film and has a function of reducing a light intensity is applied to a photolithography process for forming a gate electrode to form a complicated gate electrode. In addition, a top-gate TFT that has the multi-gate structure described above and a top gate TFT that has a single-gate structure can be formed on the same substrate just by changing the mask without increasing the number of processes.

摘要翻译： 本发明的目的是在有限的区域中形成多个元件，以减少用于积分的元件所占据的面积，从而进一步提高分辨率（增加像素数），减小每个显示像素间距，同时小型化， 并且驱动像素部分的驱动电路的集成可以在具有EL元件的液晶显示装置和发光装置等半导体装置中进行。 将具有由衍射光栅图案或半透明膜构成的辅助图案的光掩模或掩模版施加到用于形成栅电极的光刻工艺以形成复杂的栅电极 。 此外，只要通过改变掩模而不增加处理次数，就可以在同一基板上形成具有上述多栅结构的顶栅TFT和具有单栅结构的顶栅TFT。

公开(公告)号：US07476908B2

公开(公告)日：2009-01-13

申请号：US11121070

申请日：2005-05-04

申请人： Shunpei Yamazaki ,  Hideto Ohnuma ,  Aya Anzai ,  Masayuki Sakakura ,  Hiromichi Godo

发明人： Shunpei Yamazaki ,  Hideto Ohnuma ,  Aya Anzai ,  Masayuki Sakakura ,  Hiromichi Godo

IPC分类号： H01L29/207 ,  H01L33/00

CPC分类号： H01L27/3244 ,  H01L27/3248 ,  H01L27/3258 ,  H01L51/5262

摘要： An object of the invention is to provide a light emitting device in which the variation in emission spectrum depending on an angle for seeing a surface through which light is emitted is reduced. The light emitting device of the invention includes a first insulating layer formed over a substrate, a second insulating layer formed over the first insulating layer, and a semiconductor layer formed over the second insulating layer. A gate insulating layer is formed to cover the second insulating layer and the semiconductor layer. A gate electrode is formed over the gate insulating layer. A first interlayer insulating layer is formed to cover the gate insulating layer and the gate electrode. An opening is formed through the first interlayer insulating layer, the gate insulating layer and the second insulating layer. A second interlayer insulating layer is formed to cover the first insulating layer and the opening. A light emitting element is formed over the opening.

摘要翻译： 本发明的一个目的是提供一种发光装置，其中发光光谱的变化取决于用于观察发射光的表面的角度。 本发明的发光器件包括形成在衬底上的第一绝缘层，形成在第一绝缘层上的第二绝缘层，以及形成在第二绝缘层上的半导体层。 形成栅极绝缘层以覆盖第二绝缘层和半导体层。 在栅绝缘层上形成栅电极。 形成第一层间绝缘层以覆盖栅极绝缘层和栅电极。 通过第一层间绝缘层，栅极绝缘层和第二绝缘层形成开口。 形成第二层间绝缘层以覆盖第一绝缘层和开口。 在开口上形成发光元件。

公开(公告)号：US20060275710A1

公开(公告)日：2006-12-07

申请号：US11440175

申请日：2006-05-25

申请人： Shunpei Yamazaki ,  Tetsuya Kakehata ,  Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori

发明人： Shunpei Yamazaki ,  Tetsuya Kakehata ,  Hideto Ohnuma ,  Masaharu Nagai ,  Mitsuaki Osame ,  Masayuki Sakakura ,  Shigeki Komori

IPC分类号： G03F7/26

CPC分类号： H01L21/02683 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/02686 ,  H01L21/2026 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1285 ,  H01L27/1288

摘要： To provide a semiconductor device having a circuit with high operating performance and high reliability, and improve the reliability of the semiconductor device, thereby improving the reliability of an electronic device having the same. The aforementioned object is achieved by combining a step of crystallizing a semiconductor layer by irradiation with continuous wave laser beams or pulsed laser beams with a repetition rate of 10 MHz or more, while scanning in one direction; a step of photolithography with the use of a photomask or a leticle including an auxiliary pattern which is formed of a diffraction grating pattern or a semi-transmissive film having a function of reducing the light intensity; and a step of performing oxidation, nitridation, or surface-modification to the surface of the semiconductor film, an insulating film, or a conductive film, with high-density plasma with a low electron temperature.

公开(公告)号：US20120202331A1

公开(公告)日：2012-08-09

申请号：US13449383

申请日：2012-04-18

申请人： Hideto Ohnuma ,  Masayuki Sakakura

发明人： Hideto Ohnuma ,  Masayuki Sakakura

IPC分类号： H01L21/336

CPC分类号： H01L27/127 ,  H01L21/0273 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3244 ,  H01L27/3276 ,  H01L51/5237 ,  H01L51/5246 ,  H01L51/5259

摘要： The invention provides a technique to manufacture a highly reliable semiconductor device and a display device at high yield. As an exposure mask, an exposure mask provided with a diffraction grating pattern or an auxiliary pattern formed of a semi-transmissive film with a light intensity reducing function is used. With such an exposure mask, various light exposures can be more accurately controlled, which enables a resist to be processed into a more accurate shape. Therefore, when such a mask layer is used, the conductive film and the insulating film can be processed in the same step into different shapes in accordance with desired performances. As a result, thin film transistors with different characteristics, wires in different sizes and shapes, and the like can be manufactured without increasing the number of steps.

摘要翻译： 本发明提供了以高产率制造高度可靠的半导体器件和显示器件的技术。 作为曝光掩模，使用设置有衍射光栅图案的曝光掩模或由具有光强度降低功能的半透射膜形成的辅助图案。 通过这种曝光掩模，可以更精确地控制各种光照射，这使得抗蚀剂能够被加工成更准确的形状。 因此，当使用这种掩模层时，导电膜和绝缘膜可以根据期望的性能在同一步骤中被加工成不同的形状。 结果，可以在不增加步数的情况下制造具有不同特性的薄膜晶体管，不同尺寸和形状的导线等。

公开(公告)号：US07867791B2

公开(公告)日：2011-01-11

申请号：US11458266

申请日：2006-07-18

申请人： Hideto Ohnuma ,  Masayuki Sakakura

发明人： Hideto Ohnuma ,  Masayuki Sakakura

IPC分类号： H01L21/00

CPC分类号： H01L27/127 ,  H01L21/0273 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3244 ,  H01L27/3276 ,  H01L51/5237 ,  H01L51/5246 ,  H01L51/5259

摘要： The invention provides a technique to manufacture a highly reliable semiconductor device and a display device at high yield. As an exposure mask, an exposure mask provided with a diffraction grating pattern or an auxiliary pattern formed of a semi-transmissive film with a light intensity reducing function is used. With such an exposure mask, various light exposures can be more accurately controlled, which enables a resist to be processed into a more accurate shape. Therefore, when such a mask layer is used, the conductive film and the insulating film can be processed in the same step into different shapes in accordance with desired performances. As a result, thin film transistors with different characteristics, wires in different sizes and shapes, and the like can be manufactured without increasing the number of steps.

摘要翻译： 本发明提供了以高产率制造高度可靠的半导体器件和显示器件的技术。 作为曝光掩模，使用设置有衍射光栅图案的曝光掩模或由具有光强度降低功能的半透射膜形成的辅助图案。 通过这种曝光掩模，可以更精确地控制各种光照射，这使得抗蚀剂能够被加工成更准确的形状。 因此，当使用这种掩模层时，导电膜和绝缘膜可以根据期望的性能在同一步骤中被加工成不同的形状。 结果，可以在不增加步数的情况下制造具有不同特性的薄膜晶体管，不同尺寸和形状的导线等。