公开(公告)号：US06303950B1

公开(公告)日：2001-10-16

申请号：US09511248

申请日：2000-02-23

Applicant: Hitoshi Kurusu ,  Junichi Udomoto

Inventor： Hitoshi Kurusu ,  Junichi Udomoto

IPC: H01L2980

CPC classification number: H01L29/42316 ,  H01L23/4824 ,  H01L29/4175 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A field effect transistor (FET) having a stabilization circuit with a stabilization condition not affected by another circuit element, for example, a matching circuit. The stabilization circuit is pre-formed inside of the FET, thereby pre-stabilizing the FET in a frequency range in which a power amplifier is used.

Abstract translation: 具有稳定电路的场效应晶体管（FET）具有不受另一电路元件例如匹配电路影响的稳定条件。 稳定电路预先形成在FET内部，从而在使用功率放大器的频率范围内预稳定FET。

公开(公告)号：US20080246554A1

公开(公告)日：2008-10-09

申请号：US11866452

申请日：2007-10-03

Applicant: Yoshihiro Notani ,  Hitoshi Kurusu

Inventor： Yoshihiro Notani ,  Hitoshi Kurusu

IPC: G01R27/28 ,  H03H11/02

CPC classification number: G01R27/32 ,  G01R1/206 ,  G01R31/2886

Abstract: A method for inspecting a semiconductor device includes establishing a first circuit state in which electrical conduction through at least one of branch transmission line portions is established and electrical conduction through at least one other branch transmission line portion is prevented. Then, electrical signal reflection characteristics of the transmission line are measured. The method also includes establishing a second circuit state in which electrical conduction through the at least one of the branch transmission line portions is prevented and electrical conduction through the at least one other branch transmission line portions is established. Then, the electrical signal reflection characteristics of the transmission line are measured. The second circuit state is a mirror image of the first circuit state with respect to the primary transmission line. The measured values are compared.

Abstract translation: 一种用于检查半导体器件的方法包括建立第一电路状态，其中通过至少一个分支传输线部分的导电被建立，并且防止通过至少一个其它分支传输线部分的电导通。 然后，测量传输线的电信号反射特性。 该方法还包括建立第二电路状态，其中防止通过至少一个支路传输线部分的导电并且通过至少一个其它分支传输线部分的电导通。 然后，测量传输线的电信号反射特性。 第二电路状态是相对于主传输线的第一电路状态的镜像。 比较测量值。

公开(公告)号：US20050258819A1

公开(公告)日：2005-11-24

申请号：US11055698

申请日：2005-02-11

Applicant: Hiroyuki Hoshi ,  Hitoshi Kurusu

Inventor： Hiroyuki Hoshi ,  Hitoshi Kurusu

IPC: G01R23/04 ,  G01R27/04 ,  G01R27/32 ,  G01R31/28 ,  G01R35/00 ,  H01L23/544 ,  H01L23/64 ,  H01L49/00 ,  H05K1/02

CPC classification number: G01R35/007 ,  G01R31/2822 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a high frequency circuit property measurement method prior to property measurements of a high frequency circuit with RF measurement probe heads, RF measurement probe heads are calibrated using a calibration pattern comprising a signal line having a characteristic impedance and extending on a dielectric substrate, a first GND pad having one end disposed close to and at an interval from a first end of the signal line, a second GND pad having one end disposed close to and at an interval from a second end of the signal line, and a conductor electrically coupling the first GND pad to the second GND pad.

Abstract translation: 在利用RF测量探针头对高频电路进行性能测量之前的高频电路特性测量方法中，使用包括具有特征阻抗并延伸在电介质基底上的信号线的校准图案校准RF测量探针头，第一 GND端子，其一端靠近信号线的第一端并且间隔设置;第二GND焊盘，其一端靠近并且与信号线的第二端间隔设置;以及导体，其将 第一个GND焊盘到第二个GND焊盘。

公开(公告)号：US5949287A

公开(公告)日：1999-09-07

申请号：US54525

申请日：1998-04-03

Applicant: Hitoshi Kurusu ,  Yoshihiro Tsukahara

Inventor： Hitoshi Kurusu ,  Yoshihiro Tsukahara

IPC: H03G3/10 ,  H03F1/56 ,  H03F3/193 ,  H03F3/21 ,  H03F3/68 ,  H04B1/04 ,  H03F3/16

CPC classification number: H03F3/193 ,  H03F1/565

Abstract: In a power amplifier including an input matching circuit; an output matching circuit; and first and second transistors receiving a gate bias and a drain bias, the transistors having the same pinch-off voltage and being connected in parallel; resistors connected to the gates of the transistors, grounding the gate of the transistors. The resistances of the resistors are set so that when the output power increases proportionally to the input power, a gate bias applied to the first transistor exceeds the pinch-off voltage to the first transistor is ON white the gate bias applied to the second transistor does not exceed the pinch-off voltage and is OFF, and when the output power does not increase proportionally to the input power, the gate bias applied to the second transistor exceeds the pinch-off voltage of the second transistor so that both of the first and second transistors are ON. The power amplifier produces constant output power levels with respect to a wide range of input power levels.

Abstract translation: 在包括输入匹配电路的功率放大器中; 输出匹配电路; 并且第一和第二晶体管接收栅极偏置和漏极偏置，晶体管具有相同的截止电压并且并联连接; 电阻连接到晶体管的栅极，使晶体管的栅极接地。 电阻器的电阻被设置为使得当输出功率与输入功率成比例地增加时，施加到第一晶体管的栅极偏压超过第一晶体管的截止电压为白色，施加到第二晶体管的栅极偏置为 不超过夹断电压并且为OFF，并且当输出功率不与输入功率成比例地增加时，施加到第二晶体管的栅极偏压超过第二晶体管的夹断电压，使得第一和第 第二晶体管导通。 功率放大器相对于宽范围的输入功率电平产生恒定的输出功率电平。

公开(公告)号：US08907454B2

公开(公告)日：2014-12-09

申请号：US13763798

申请日：2013-02-11

Applicant: Yoshinobu Sasaki ,  Hitoshi Kurusu

Inventor： Yoshinobu Sasaki ,  Hitoshi Kurusu

IPC: H01L27/102 ,  H01L27/04 ,  H01L29/73

CPC classification number: H01L27/04 ,  H01L29/73

Abstract: A transistor includes: a semiconductor substrate; a first electrode on the semiconductor substrate and having first and second portions; a second electrode on the semiconductor substrate and spaced apart from the first electrode; a control electrode on the semiconductor substrate and disposed between the first electrode and the second electrode; and a first heat sink plate joined to the second portion of the first electrode without being joined to the first portion of the first electrode.

Abstract translation: 晶体管包括：半导体衬底; 半导体衬底上的第一电极，并具有第一和第二部分; 在所述半导体衬底上并与所述第一电极间隔开的第二电极; 控制电极，位于所述第一电极和所述第二电极之间; 以及与第一电极的第二部分接合而不连接到第一电极的第一部分的第一散热板。

公开(公告)号：US07622930B2

公开(公告)日：2009-11-24

申请号：US11866452

申请日：2007-10-03

Applicant: Yoshihiro Notani ,  Hitoshi Kurusu

Inventor： Yoshihiro Notani ,  Hitoshi Kurusu

IPC: G01R31/11

CPC classification number: G01R27/32 ,  G01R1/206 ,  G01R31/2886

Abstract: A method for inspecting a semiconductor device includes establishing a first circuit state in which electrical conduction through at least one of branch transmission line portions is established and electrical conduction through at least one other branch transmission line portion is prevented. Then, electrical signal reflection characteristics of the transmission line are measured. The method also includes establishing a second circuit state in which electrical conduction through the at least one of the branch transmission line portions is prevented and electrical conduction through the at least one other branch transmission line portions is established. Then, the electrical signal reflection characteristics of the transmission line are measured. The second circuit state is a mirror image of the first circuit state with respect to the primary transmission line. The measured values are compared.

Abstract translation: 一种用于检查半导体器件的方法包括建立第一电路状态，其中通过至少一个分支传输线部分的导电被建立，并且防止通过至少一个其它分支传输线部分的电导通。 然后，测量传输线的电信号反射特性。 该方法还包括建立第二电路状态，其中防止通过至少一个支路传输线部分的导电并且通过至少一个其它分支传输线部分的电导通。 然后，测量传输线的电信号反射特性。 第二电路状态是相对于主传输线的第一电路状态的镜像。 比较测量值。

公开(公告)号：US20130264682A1

公开(公告)日：2013-10-10

申请号：US13763798

申请日：2013-02-11

Applicant: Yoshinobu Sasaki ,  Hitoshi Kurusu

Inventor： Yoshinobu Sasaki ,  Hitoshi Kurusu

IPC: H01L27/04 ,  H01L29/73

CPC classification number: H01L27/04 ,  H01L29/73

Abstract: A transistor includes: a semiconductor substrate; a first electrode on the semiconductor substrate and having first and second portions; a second electrode on the semiconductor substrate and spaced apart from the first electrode; a control electrode on the semiconductor substrate and disposed between the first electrode and the second electrode; and a first heat sink plate joined to the second portion of the first electrode without being joined to the first portion of the first electrode.

Abstract translation: 晶体管包括：半导体衬底; 半导体衬底上的第一电极，并具有第一和第二部分; 在所述半导体衬底上并与所述第一电极间隔开的第二电极; 控制电极，位于所述第一电极和所述第二电极之间; 以及与第一电极的第二部分接合而不连接到第一电极的第一部分的第一散热板。

公开(公告)号：US08289102B2

公开(公告)日：2012-10-16

申请号：US12781848

申请日：2010-05-18

Applicant: Kazuya Yamamoto ,  Miyo Miyashita ,  Hitoshi Kurusu ,  Tomoyuki Asada

Inventor： Kazuya Yamamoto ,  Miyo Miyashita ,  Hitoshi Kurusu ,  Tomoyuki Asada

IPC: H01P5/18 ,  H01P1/18

CPC classification number: H01P5/184 ,  H01P5/18

Abstract: A directional coupler includes capacitive elements electrically connected to a coupled port and an isolated port, respectively, for a coupled line on a chip (on-chip). The capacitive elements serve as matching capacitive elements and may be MIM (Metal Insulator Metal) capacitors on a substrate. A first end of a first of the capacitive elements is connected between the coupled port and the coupled line and a second end is grounded. A first end of a second of the capacitive elements is connected between the isolated port and the coupled line and a second end is grounded.

Abstract translation: 定向耦合器包括分别电连接到芯片上（芯片上）上的耦合线的耦合端口和隔离端口的电容元件。 电容元件用作匹配的电容元件，并且可以是衬底上的MIM（金属绝缘体金属）电容器。 第一电容元件的第一端连接在耦合端口和耦合线路之间，第二端接地。 第二电容元件的第一端连接在隔离端口和耦合线之间，第二端接地。

公开(公告)号：US20110057746A1

公开(公告)日：2011-03-10

申请号：US12781848

申请日：2010-05-18

Applicant: Kazuya Yamamoto ,  Miyo Miyashita ,  Hitoshi Kurusu ,  Tomoyuki Asada

Inventor： Kazuya Yamamoto ,  Miyo Miyashita ,  Hitoshi Kurusu ,  Tomoyuki Asada

IPC: H01P5/18

CPC classification number: H01P5/184 ,  H01P5/18

Abstract: A directional coupler includes capacitive elements electrically connected to a coupled port and an isolated port, respectively, for a coupled line on a chip (on-chip). The capacitive elements serve as matching capacitive elements and may be MIM (Metal Insulator Metal) capacitors on a substrate. A first end of a first of the capacitive elements is connected between the coupled port and the coupled line and a second end is grounded. A first end of a second of the capacitive elements is connected between the isolated port and the coupled line and a second end is grounded.

Abstract translation: 定向耦合器包括分别电连接到芯片上（芯片上）上的耦合线的耦合端口和隔离端口的电容元件。 电容元件用作匹配的电容元件，并且可以是衬底上的MIM（金属绝缘体金属）电容器。 第一电容元件的第一端连接在耦合端口和耦合线路之间，第二端接地。 第二电容元件的第一端连接在隔离端口和耦合线之间，第二端接地。

公开(公告)号：US06252266B1

公开(公告)日：2001-06-26

申请号：US09350525

申请日：1999-07-12

Applicant: Hiroyuki Hoshi ,  Hitoshi Kurusu

Inventor： Hiroyuki Hoshi ,  Hitoshi Kurusu

IPC: H01L2980

CPC classification number: H01L29/41725 ,  H01L22/32 ,  H01L23/481 ,  H01L23/4821 ,  H01L23/4824 ,  H01L29/42316 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A semiconductor device with a field-effect transistor for use at a high frequency, higher than the microwave frequency band, has a pair of grounding electrodes, each having a via hole with an elliptical cross-section, the major axis of which is parallel to a direction in which source electrodes are arranged. Instead of the elliptical via hole, each grounding electrode may have via holes through which the grounding electrode is grounded.

Abstract translation: 具有高于微波频带的高频使用的场效应晶体管的半导体器件具有一对接地电极，每个接地电极具有椭圆形截面的通孔，其长轴平行于 源电极布置的方向。 代替椭圆形通孔，每个接地电极可以具有接地电极所通过的通孔。