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1.发明授权公开(公告)号：US07259091B2
公开(公告)日：2007-08-21
申请号：US11112509
申请日：2005-04-22
IPC分类号： H01L21/4763
CPC分类号： H01L21/02063 , H01L21/76802 , H01L21/76814
摘要： By performing a wet chemical process after etching a via, contaminations may be removed and a thin passivation layer may be formed that may then be readily removed in a subsequent sputter etch process for forming a barrier/adhesion layer. In a particular embodiment, the wet chemical process may be performed on the basis of fluoric acid and triazole or a compound thereof.
摘要翻译： 通过在蚀刻通孔之后进行湿化学处理，可以去除污染物，并且可以形成薄的钝化层，然后可以在随后的溅射蚀刻工艺中容易地去除以形成阻挡层/粘附层。 在一个具体实施方案中，湿化学方法可以基于氟酸和三唑或其化合物进行。
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2.发明申请公开(公告)号：US20060024951A1
公开(公告)日：2006-02-02
申请号：US11112509
申请日：2005-04-22
IPC分类号： H01L21/4763
CPC分类号： H01L21/02063 , H01L21/76802 , H01L21/76814
摘要： By performing a wet chemical process after etching a via, contaminations may be removed and a thin passivation layer may be formed that may then be readily removed in a subsequent sputter etch process for forming a barrier/adhesion layer. In a particular embodiment, the wet chemical process may be performed on the basis of fluoric acid and triazole or a compound thereof.
摘要翻译： 通过在蚀刻通孔之后进行湿化学处理，可以去除污染物，并且可以形成薄的钝化层，然后可以在随后的溅射蚀刻工艺中容易地去除以形成阻挡层/粘附层。 在一个具体实施方案中，湿化学方法可以基于氟酸和三唑或其化合物进行。
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3.发明授权Method of reducing contamination by removing an interlayer dielectric from the substrate edge 失效通过从衬底边缘去除层间电介质来减少污染的方法公开(公告)号：US07410885B2
公开(公告)日：2008-08-12
申请号：US11383903
申请日：2006-05-17
IPC分类号： H01L21/30
CPC分类号： H01L21/76802 , H01L21/02087 , H01L21/31111 , H01L21/32134 , H01L21/76808 , H01L21/76843
摘要： By performing at least one additional wet chemical etch process in the edge region and in particular on the bevel of a substrate during the formation of a metallization layer, the dielectric material, especially the low-k dielectric material, may be reliably removed from the bevel prior to the formation of any barrier and metal layers. Moreover, an additional wet chemical etch process may be performed after the deposition of the metal to remove any unwanted metal and barrier material from the edge region and the bevel. Accordingly, defect issues and contamination of substrates and process tools may be efficiently reduced.
摘要翻译： 通过在形成金属化层期间在边缘区域中，特别是在衬底的斜面上执行至少一个额外的湿化学蚀刻工艺，可以将电介质材料，特别是低k电介质材料从斜面可靠地移除 在形成任何阻挡层和金属层之前。 此外，可以在沉积金属以从边缘区域和斜面去除任何不需要的金属和阻挡材料之后进行另外的湿化学蚀刻工艺。 因此，可以有效地降低基板和加工工具的缺陷问题和污染。
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4.发明申请METHOD OF REDUCING CONTAMINATION BY REMOVING AN INTERLAYER DIELECTRIC FROM THE SUBSTRATE EDGE 失效通过从基板边缘移除介质层来减少污染的方法公开(公告)号：US20070026670A1
公开(公告)日：2007-02-01
申请号：US11383903
申请日：2006-05-17
IPC分类号： H01L21/4763
CPC分类号： H01L21/76802 , H01L21/02087 , H01L21/31111 , H01L21/32134 , H01L21/76808 , H01L21/76843
摘要： By performing at least one additional wet chemical etch process in the edge region and in particular on the bevel of a substrate during the formation of a metallization layer, the dielectric material, especially the low-k dielectric material, may be reliably removed from the bevel prior to the formation of any barrier and metal layers. Moreover, an additional wet chemical etch process may be performed after the deposition of the metal to remove any unwanted metal and barrier material from the edge region and the bevel. Accordingly, defect issues and contamination of substrates and process tools may be efficiently reduced.
摘要翻译： 通过在形成金属化层期间在边缘区域中，特别是在衬底的斜面上执行至少一个额外的湿化学蚀刻工艺，可以将电介质材料，特别是低k电介质材料从斜面可靠地移除 在形成任何阻挡层和金属层之前。 此外，可以在沉积金属以从边缘区域和斜面去除任何不需要的金属和阻挡材料之后进行另外的湿化学蚀刻工艺。 因此，可以有效地降低基板和加工工具的缺陷问题和污染。
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公开(公告)号：US20060141775A1
公开(公告)日：2006-06-29
申请号：US11196883
申请日：2005-08-04
IPC分类号： H01L21/4763 , H01L21/302
CPC分类号： H01L21/76807 , H01L21/02063
摘要： A method of forming a semiconductor structure comprises providing a substrate comprising a layer of a material formed on a first surface of the substrate. At least one recess is formed in the layer of material. The formation of the at least one recess comprises performing a dry etching process. A contamination layer formed in the dry etching process is removed from a second surface of the substrate. Thus, contaminations of tools used in later stages of the manufacturing process resulting from flakes splitting off the contamination layer may be avoided.
摘要翻译： 形成半导体结构的方法包括提供包括形成在基板的第一表面上的材料层的基板。 在材料层中形成至少一个凹部。 至少一个凹部的形成包括进行干蚀刻工艺。 在干蚀刻工艺中形成的污染层从衬底的第二表面去除。 因此，可以避免在由污染层分离的薄片产生的制造过程的后期阶段使用的工具的污染。
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公开(公告)号：US20120315755A1
公开(公告)日：2012-12-13
申请号：US13158114
申请日：2011-06-10
申请人： Christin Bartsch , Susanne Leppack
发明人： Christin Bartsch , Susanne Leppack
IPC分类号： H01L21/768
CPC分类号： H01L21/02063 , H01L21/32139 , H01L21/76814 , H01L21/76843
摘要： A passivation layer is formed on inlaid Cu for protection against oxidation and removal during subsequent removal of an overlying metal hardmask. Embodiments include treating an exposed upper surface of inlaid Cu with hydrofluoric acid and a copper complexing agent, such as benzene triazole, to form a passivation monolayer of a copper complex, etching to remove the metal hardmask, removing the passivation layer by heating to at least 300° C., and forming a barrier layer on the exposed upper surface of the inlaid Cu.
摘要翻译： 在嵌入的Cu上形成钝化层，用于在随后除去上覆的金属硬掩模期间防止氧化和去除。 实施方案包括用氢氟酸和铜络合剂如苯三唑处理嵌入的Cu的暴露的上表面以形成铜络合物的钝化单层，蚀刻去除金属硬掩模，通过加热至少去除钝化层 300℃，并在嵌入的Cu的暴露的上表面上形成阻挡层。
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7.发明授权Method of reducing erosion of a metal cap layer during via patterning in semiconductor devices 有权在半导体器件中通孔图案化期间减少金属覆盖层侵蚀的方法公开(公告)号：US07986040B2
公开(公告)日：2011-07-26
申请号：US12397661
申请日：2009-03-04
IPC分类号： H01L23/522
CPC分类号： H01L21/76844 , H01L21/76805 , H01L21/76807 , H01L21/76814 , H01L21/76834 , H01L21/76883
摘要： During the patterning of via openings in sophisticated metallization systems of semi-conductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
摘要翻译： 在半导体器件的复杂金属化系统中的通孔开口的图案化期间，开口可以延伸穿过导电盖层，并且可以建立适当的离子轰击以将下面的金属区域的材料重新分布到导电盖层的暴露的侧壁部分 ，从而建立保护材料。 因此，在随后的湿式化学蚀刻工艺中，导电盖层过度去除材料的可能性可能会大大降低。
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8.发明申请METHOD OF REDUCING EROSION OF A METAL CAP LAYER DURING VIA PATTERNING IN SEMICONDUCTOR DEVICES 有权通过半导体器件中的方式减少金属层的腐蚀的方法公开(公告)号：US20120003832A1
公开(公告)日：2012-01-05
申请号：US13109639
申请日：2011-05-17
IPC分类号： H01L21/28 , H01L21/306
CPC分类号： H01L21/76844 , H01L21/76805 , H01L21/76807 , H01L21/76814 , H01L21/76834 , H01L21/76883
摘要： During the patterning of via openings in sophisticated metallization systems of semiconductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
摘要翻译： 在半导体器件的复杂金属化系统中的通路开口的图案化期间，开口可以延伸穿过导电盖层，并且可以建立适当的离子轰击以将下面的金属区域的材料重新分布到导电盖层的暴露的侧壁部分，由此 建立保护材料。 因此，在随后的湿式化学蚀刻工艺中，导电盖层过度去除材料的可能性可能会大大降低。
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9.发明申请公开(公告)号：US20090319196A1
公开(公告)日：2009-12-24
申请号：US12417787
申请日：2009-04-03
CPC分类号： G01N21/84 , G01N21/3563 , G01N2021/3595 , G01N2021/8416 , H01L22/12
摘要： By using powerful data analysis techniques, such as PCR, PLS, CLS and the like, in combination with measurement techniques providing structural information, gradually varying material characteristics may be determined during semiconductor fabrication, thereby also enabling the monitoring of complex manufacturing sequences. For instance, the material characteristics of sensitive dielectric materials, such as ULK material, may be detected, for instance with respect to an extension of a damage zone, in order to monitor the quality of metallization systems of sophisticated semiconductor devices. The inline measurement data may be obtained on the basis of infrared spectroscopy, for instance using FTIR and the like, which may even allow directly obtaining the measurement data at process chambers, substantially without affecting the overall process throughput.
摘要翻译： 通过使用强大的数据分析技术，例如PCR，PLS，CLS等，结合提供结构信息的测量技术，可以在半导体制造期间确定逐渐变化的材料特性，从而也可以监测复杂的制造顺序。 例如，为了监测复杂半导体器件的金属化系统的质量，可以例如相对于损伤区域的延伸部分来检测诸如ULK材料的敏感电介质材料的材料特性。 可以基于红外光谱法获得在线测量数据，例如使用FTIR等，其甚至可以允许在处理室处直接获得测量数据，基本上不影响整个工艺处理量。
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公开(公告)号：US08664115B2
公开(公告)日：2014-03-04
申请号：US13158114
申请日：2011-06-10
申请人： Christin Bartsch , Susanne Leppack
发明人： Christin Bartsch , Susanne Leppack
IPC分类号： H01L21/4763
CPC分类号： H01L21/02063 , H01L21/32139 , H01L21/76814 , H01L21/76843
摘要： A passivation layer is formed on inlaid Cu for protection against oxidation and removal during subsequent removal of an overlying metal hardmask. Embodiments include treating an exposed upper surface of inlaid Cu with hydrofluoric acid and a copper complexing agent, such as benzene triazole, to form a passivation monolayer of a copper complex, etching to remove the metal hardmask, removing the passivation layer by heating to at least 300° C., and forming a barrier layer on the exposed upper surface of the inlaid Cu.
摘要翻译： 在嵌入的Cu上形成钝化层，用于在随后除去上覆的金属硬掩模期间防止氧化和去除。 实施方案包括用氢氟酸和铜络合剂如苯三唑处理嵌入的Cu的暴露的上表面以形成铜络合物的钝化单层，蚀刻去除金属硬掩模，通过加热至少去除钝化层 300℃，并在嵌入的Cu的暴露的上表面上形成阻挡层。
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