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公开(公告)号：US20060141775A1
公开(公告)日：2006-06-29
申请号：US11196883
申请日：2005-08-04
IPC分类号： H01L21/4763 , H01L21/302
CPC分类号： H01L21/76807 , H01L21/02063
摘要： A method of forming a semiconductor structure comprises providing a substrate comprising a layer of a material formed on a first surface of the substrate. At least one recess is formed in the layer of material. The formation of the at least one recess comprises performing a dry etching process. A contamination layer formed in the dry etching process is removed from a second surface of the substrate. Thus, contaminations of tools used in later stages of the manufacturing process resulting from flakes splitting off the contamination layer may be avoided.
摘要翻译： 形成半导体结构的方法包括提供包括形成在基板的第一表面上的材料层的基板。 在材料层中形成至少一个凹部。 至少一个凹部的形成包括进行干蚀刻工艺。 在干蚀刻工艺中形成的污染层从衬底的第二表面去除。 因此，可以避免在由污染层分离的薄片产生的制造过程的后期阶段使用的工具的污染。
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2.发明授权Method of reducing erosion of a metal cap layer during via patterning in semiconductor devices 有权在半导体器件中通孔图案化期间减少金属覆盖层侵蚀的方法公开(公告)号：US07986040B2
公开(公告)日：2011-07-26
申请号：US12397661
申请日：2009-03-04
IPC分类号： H01L23/522
CPC分类号： H01L21/76844 , H01L21/76805 , H01L21/76807 , H01L21/76814 , H01L21/76834 , H01L21/76883
摘要： During the patterning of via openings in sophisticated metallization systems of semi-conductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
摘要翻译： 在半导体器件的复杂金属化系统中的通孔开口的图案化期间，开口可以延伸穿过导电盖层，并且可以建立适当的离子轰击以将下面的金属区域的材料重新分布到导电盖层的暴露的侧壁部分 ，从而建立保护材料。 因此，在随后的湿式化学蚀刻工艺中，导电盖层过度去除材料的可能性可能会大大降低。
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3.发明申请METHOD OF REDUCING EROSION OF A METAL CAP LAYER DURING VIA PATTERNING IN SEMICONDUCTOR DEVICES 有权通过半导体器件中的方式减少金属层的腐蚀的方法公开(公告)号：US20120003832A1
公开(公告)日：2012-01-05
申请号：US13109639
申请日：2011-05-17
IPC分类号： H01L21/28 , H01L21/306
CPC分类号： H01L21/76844 , H01L21/76805 , H01L21/76807 , H01L21/76814 , H01L21/76834 , H01L21/76883
摘要： During the patterning of via openings in sophisticated metallization systems of semiconductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
摘要翻译： 在半导体器件的复杂金属化系统中的通路开口的图案化期间，开口可以延伸穿过导电盖层，并且可以建立适当的离子轰击以将下面的金属区域的材料重新分布到导电盖层的暴露的侧壁部分，由此 建立保护材料。 因此，在随后的湿式化学蚀刻工艺中，导电盖层过度去除材料的可能性可能会大大降低。
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4.发明申请公开(公告)号：US20090319196A1
公开(公告)日：2009-12-24
申请号：US12417787
申请日：2009-04-03
CPC分类号： G01N21/84 , G01N21/3563 , G01N2021/3595 , G01N2021/8416 , H01L22/12
摘要： By using powerful data analysis techniques, such as PCR, PLS, CLS and the like, in combination with measurement techniques providing structural information, gradually varying material characteristics may be determined during semiconductor fabrication, thereby also enabling the monitoring of complex manufacturing sequences. For instance, the material characteristics of sensitive dielectric materials, such as ULK material, may be detected, for instance with respect to an extension of a damage zone, in order to monitor the quality of metallization systems of sophisticated semiconductor devices. The inline measurement data may be obtained on the basis of infrared spectroscopy, for instance using FTIR and the like, which may even allow directly obtaining the measurement data at process chambers, substantially without affecting the overall process throughput.
摘要翻译： 通过使用强大的数据分析技术，例如PCR，PLS，CLS等，结合提供结构信息的测量技术，可以在半导体制造期间确定逐渐变化的材料特性，从而也可以监测复杂的制造顺序。 例如，为了监测复杂半导体器件的金属化系统的质量，可以例如相对于损伤区域的延伸部分来检测诸如ULK材料的敏感电介质材料的材料特性。 可以基于红外光谱法获得在线测量数据，例如使用FTIR等，其甚至可以允许在处理室处直接获得测量数据，基本上不影响整个工艺处理量。
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5.发明授权公开(公告)号：US08423320B2
公开(公告)日：2013-04-16
申请号：US12417787
申请日：2009-04-03
IPC分类号： G01B11/00
CPC分类号： G01N21/84 , G01N21/3563 , G01N2021/3595 , G01N2021/8416 , H01L22/12
摘要： By using powerful data analysis techniques, such as PCR, PLS, CLS and the like, in combination with measurement techniques providing structural information, gradually varying material characteristics may be determined during semiconductor fabrication, thereby also enabling the monitoring of complex manufacturing sequences. For instance, the material characteristics of sensitive dielectric materials, such as ULK material, may be detected, for instance with respect to an extension of a damage zone, in order to monitor the quality of metallization systems of sophisticated semiconductor devices. The inline measurement data may be obtained on the basis of infrared spectroscopy, for instance using FTIR and the like, which may even allow directly obtaining the measurement data at process chambers, substantially without affecting the overall process throughput.
摘要翻译： 通过使用强大的数据分析技术，例如PCR，PLS，CLS等，结合提供结构信息的测量技术，可以在半导体制造期间确定逐渐变化的材料特性，从而也可以监测复杂的制造顺序。 例如，为了监测复杂半导体器件的金属化系统的质量，可以例如相对于损伤区域的延伸部分来检测诸如ULK材料的敏感电介质材料的材料特性。 可以基于红外光谱法获得在线测量数据，例如使用FTIR等，其甚至可以允许在处理室处直接获得测量数据，基本上不影响整个工艺处理量。
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6.发明授权Method of reducing erosion of a metal cap layer during via patterning in semiconductor devices 有权在半导体器件中通孔图案化期间减少金属覆盖层侵蚀的方法公开(公告)号：US08338293B2
公开(公告)日：2012-12-25
申请号：US13109639
申请日：2011-05-17
IPC分类号： H01L21/28
CPC分类号： H01L21/76844 , H01L21/76805 , H01L21/76807 , H01L21/76814 , H01L21/76834 , H01L21/76883
摘要： During the patterning of via openings in sophisticated metallization systems of semiconductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
摘要翻译： 在半导体器件的复杂金属化系统中的通路开口的图案化期间，开口可以延伸穿过导电盖层，并且可以建立适当的离子轰击以将下面的金属区域的材料重新分布到导电盖层的暴露的侧壁部分，由此 建立保护材料。 因此，在随后的湿式化学蚀刻工艺中，导电盖层过度去除材料的可能性可能会大大降低。
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7.发明申请METHOD OF REDUCING EROSION OF A METAL CAP LAYER DURING VIA PATTERNING IN SEMICONDUCTOR DEVICES 有权通过半导体器件中的方式减少金属层的腐蚀的方法公开(公告)号：US20090273086A1
公开(公告)日：2009-11-05
申请号：US12397661
申请日：2009-03-04
IPC分类号： H01L23/522 , H01L21/306
CPC分类号： H01L21/76844 , H01L21/76805 , H01L21/76807 , H01L21/76814 , H01L21/76834 , H01L21/76883
摘要： During the patterning of via openings in sophisticated metallization systems of semi-conductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
摘要翻译： 在半导体器件的复杂金属化系统中的通孔开口的图案化期间，开口可以延伸穿过导电盖层，并且可以建立适当的离子轰击以将下面的金属区域的材料重新分布到导电盖层的暴露的侧壁部分 ，从而建立保护材料。 因此，在随后的湿式化学蚀刻工艺中，导电盖层过度去除材料的可能性可能会大大降低。
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8.发明申请Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress 有权通过形成具有不同修正的固有应力的蚀刻停止层堆叠在不同沟道区域中产生不同的机械应变的技术公开(公告)号：US20060091471A1
公开(公告)日：2006-05-04
申请号：US11150635
申请日：2005-06-10
IPC分类号： H01L29/78 , H01L21/8238 , H01L21/469
CPC分类号： H01L29/4933 , H01L21/31116 , H01L21/7624 , H01L21/823807 , H01L21/823835 , H01L29/665 , H01L29/7843
摘要： A technique is provided that allows the formation of contact etch stop layers having different intrinsic stress for different transistors, while substantially avoiding any device degradation owing to the partial removal of the contact etch stop layer. Hereby, an additional thin etch stop layer is provided prior to the formation of the contact etch stop layers, thereby substantially maintaining the integrity of metal silicide regions, when a portion of an initially deposited contact etch stop layer is removed.
摘要翻译： 提供了允许形成对于不同晶体管具有不同固有应力的接触蚀刻停止层的技术，同时基本上避免了由于部分去除接触蚀刻停止层而导致的任何器件劣化。 因此，在形成接触蚀刻停止层之前，提供另外的薄蚀刻停止层，从而当初始沉积的接触蚀刻停止层的一部分被去除时，基本上保持金属硅化物区域的完整性。
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9.发明授权Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress 有权通过形成具有不同修正的固有应力的蚀刻停止层堆叠在不同沟道区域中产生不同的机械应变的技术公开(公告)号：US07396718B2
公开(公告)日：2008-07-08
申请号：US11150635
申请日：2005-06-10
IPC分类号： H01L21/8238
CPC分类号： H01L29/4933 , H01L21/31116 , H01L21/7624 , H01L21/823807 , H01L21/823835 , H01L29/665 , H01L29/7843
摘要： A technique is provided that allows the formation of contact etch stop layers having different intrinsic stress for different transistors, while substantially avoiding any device degradation owing to the partial removal of the contact etch stop layer. Hereby, an additional thin etch stop layer is provided prior to the formation of the contact etch stop layers, thereby substantially maintaining the integrity of metal silicide regions, when a portion of an initially deposited contact etch stop layer is removed.
摘要翻译： 提供了允许形成对于不同晶体管具有不同固有应力的接触蚀刻停止层的技术，同时基本上避免了由于部分去除接触蚀刻停止层而导致的任何器件劣化。 因此，在形成接触蚀刻停止层之前，提供另外的薄蚀刻停止层，从而当初始沉积的接触蚀刻停止层的一部分被去除时，基本上保持金属硅化物区域的完整性。
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10.发明申请Method and System for Extracting Samples After Patterning of Microstructure Devices 有权微结构器件图案化后提取样品的方法和系统公开(公告)号：US20120052601A1
公开(公告)日：2012-03-01
申请号：US13180143
申请日：2011-07-11
申请人： Dmytro Chumakov , Petra Hetzer , Matthias Schaller
发明人： Dmytro Chumakov , Petra Hetzer , Matthias Schaller
CPC分类号： G01N1/04 , G01N2001/2833 , H01L21/02096
摘要： Analysis of chemical and physical characteristics of polymer species and etch residues caused in critical plasma-assisted etch processes for patterning material layers in semiconductor devices may be accomplished by removing at least a portion of these species on the basis of a probing material layer, which may be lifted-off from the patterned surface. The probing material layer may substantially suppress a chemical modification of the species of interest and may thus allow the examination of the initial status of these species.
摘要翻译： 可以通过基于探测材料层去除这些物质的至少一部分来实现在半导体器件中图案化材料层的关键等离子体辅助蚀刻工艺中引起的聚合物种类和蚀刻残留物的化学和物理特性的分析， 从图案的表面上脱下来。 探测材料层可以基本上抑制感兴趣物种的化学修饰，并且因此可以允许检查这些物种的初始状态。
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