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1.发明申请Programmable Heavy-Ion Sensing Device for Accelerated Dram Soft Error Detection 有权可编程重离子感应装置，用于加速引导软错误检测公开(公告)号：US20080273393A1
公开(公告)日：2008-11-06
申请号：US11689096
申请日：2007-03-21
IPC分类号： G11C16/28
CPC分类号： G11C11/406 , G01R31/31816 , G11C11/401 , G11C11/40615 , G11C11/4078 , G11C11/4091 , G11C29/026 , G11C29/028 , G11C29/50 , G11C29/52 , G11C2029/5002
摘要： Aspects of the invention relate to a programmable heavy-ion sensing device for accelerated DRAM soft error detection. Design of a DRAM-based alpha particle sensing apparatus is preferred to be used as an accelerated on-chip SER test vehicle. The sensing apparatus is provided with programmable sensing margin, refresh rate, and supply voltage to achieve various degree of SER sensitivity. In addition, a dual-mode DRAM array is proposed so that at least a portion of the array can be used to monitor high-energy particle activities during soft-error detection (SED) mode.
摘要翻译： 本发明的方面涉及用于加速DRAM软错误检测的可编程重离子感测装置。 优选将基于DRAM的α粒子感测装置的设计用作加速片上SER测试车辆。 该感测装置具有可编程的感应余量，刷新率和电源电压，以达到SER灵敏度的各种程度。 另外，提出了双模DRAM阵列，使得阵列的至少一部分可以用于在软错误检测（SED）模式期间监视高能量粒子活动。
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2.发明授权Programmable heavy-ion sensing device for accelerated DRAM soft error detection 有权用于加速DRAM软错误检测的可编程重离子感测装置公开(公告)号：US07499308B2
公开(公告)日：2009-03-03
申请号：US11689096
申请日：2007-03-21
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G01R31/31816 , G11C11/401 , G11C11/40615 , G11C11/4078 , G11C11/4091 , G11C29/026 , G11C29/028 , G11C29/50 , G11C29/52 , G11C2029/5002
摘要： Aspects of the invention relate to a programmable heavy-ion sensing device for accelerated DRAM soft error detection. Design of a DRAM-based alpha particle sensing apparatus is preferred to be used as an accelerated on-chip SER test vehicle. The sensing apparatus is provided with programmable sensing margin, refresh rate, and supply voltage to achieve various degree of SER sensitivity. In addition, a dual-mode DRAM array is proposed so that at least a portion of the array can be used to monitor high-energy particle activities during soft-error detection (SED) mode.
摘要翻译： 本发明的方面涉及用于加速DRAM软错误检测的可编程重离子感测装置。 优选将基于DRAM的α粒子感测装置的设计用作加速片上SER测试车辆。 该感测装置具有可编程的感应余量，刷新率和电源电压，以达到SER灵敏度的各种程度。 另外，提出了双模DRAM阵列，使得阵列的至少一部分可以用于在软错误检测（SED）模式期间监视高能量粒子活动。
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3.发明授权Programmable heavy-ion sensing device for accelerated DRAM soft error detection 有权用于加速DRAM软错误检测的可编程重离子感测装置公开(公告)号：US07675789B2
公开(公告)日：2010-03-09
申请号：US12134347
申请日：2008-06-06
IPC分类号： G11C11/34
CPC分类号： G11C11/406 , G01R31/31816 , G11C11/401 , G11C11/40615 , G11C11/4078 , G11C11/4091 , G11C29/026 , G11C29/028 , G11C29/50 , G11C29/52 , G11C2029/5002
摘要： Aspects of the invention relate to a programmable heavy-ion sensing device for accelerated DRAM soft error detection. Design of a DRAM-based alpha particle sensing apparatus is preferred to be used as an accelerated on-chip SER test vehicle. The sensing apparatus is provided with programmable sensing margin, refresh rate, and supply voltage to achieve various degree of SER sensitivity. In addition, a dual-mode DRAM array is proposed so that at least a portion of the array can be used to monitor high-energy particle activities during soft-error detection (SED) mode.
摘要翻译： 本发明的方面涉及用于加速DRAM软错误检测的可编程重离子感测装置。 优选将基于DRAM的α粒子感测装置的设计用作加速片上SER测试车辆。 该感测装置具有可编程的感应余量，刷新率和电源电压，以达到SER灵敏度的各种程度。 另外，提出了双模DRAM阵列，使得阵列的至少一部分可以用于在软错误检测（SED）模式期间监视高能量粒子活动。
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4.发明申请Programmable Heavy-Ion Sensing Device for Accelerated DRAM Soft Error Detection 有权用于加速DRAM软错误检测的可编程重离子感测装置公开(公告)号：US20080266984A1
公开(公告)日：2008-10-30
申请号：US12134347
申请日：2008-06-06
申请人： Howard H. Chen , John A. Fifield , Louis L. Hsu , Henry H.K. Tang
发明人： Howard H. Chen , John A. Fifield , Louis L. Hsu , Henry H.K. Tang
IPC分类号： G11C7/10
CPC分类号： G11C11/406 , G01R31/31816 , G11C11/401 , G11C11/40615 , G11C11/4078 , G11C11/4091 , G11C29/026 , G11C29/028 , G11C29/50 , G11C29/52 , G11C2029/5002
摘要： Aspects of the invention relate to a programmable heavy-ion sensing device for accelerated DRAM soft error detection. Design of a DRAM-based alpha particle sensing apparatus is preferred to be used as an accelerated on-chip SER test vehicle. The sensing apparatus is provided with programmable sensing margin, refresh rate, and supply voltage to achieve various degree of SER sensitivity. In addition, a dual-mode DRAM array is proposed so that at least a portion of the array can be used to monitor high-energy particle activities during soft-error detection (SED) mode.
摘要翻译： 本发明的方面涉及用于加速DRAM软错误检测的可编程重离子感测装置。 优选将基于DRAM的α粒子感测装置的设计用作加速片上SER测试车辆。 该感测装置具有可编程的感应余量，刷新率和电源电压，以达到SER灵敏度的各种程度。 另外，提出了双模DRAM阵列，使得阵列的至少一部分可以用于在软错误检测（SED）模式期间监视高能量粒子活动。
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公开(公告)号：US20110002188A1
公开(公告)日：2011-01-06
申请号：US12498175
申请日：2009-07-06
申请人： Howard H. Chen , John A. Fifield , Louis C. Hsu
发明人： Howard H. Chen , John A. Fifield , Louis C. Hsu
IPC分类号： G11C17/18
摘要： Electronic fuse (e-fuse) systems with multiple reprogrammability are provided. In one aspect, a reprogrammable e-fuse system is provided that includes a first e-fuse string; a second e-fuse string; a selector connected to both the first e-fuse string and the second e-fuse string configured to alternately select an e-fuse from the first e-fuse string or the second e-fuse string to be programmed; and a comparator connected to both the first e-fuse string and the second e-fuse string configured to compare a voltage across the first e-fuse string to a voltage across the second e-fuse string to determine a programming state of the e-fuse system.
摘要翻译： 提供具有多重重新编程能力的电子保险丝（e-fuse）系统。 在一个方面，提供了一种可再编程电子熔丝系统，其包括第一电熔丝串; 第二个电熔丝串; 连接到第一电熔丝串和第二电熔丝串的选择器，被配置为交替地从要编程的第一电熔丝串或第二电熔丝串中选择电熔丝; 以及连接到第一电熔丝串和第二电熔丝串两者的比较器，被配置为将第一电熔丝串两端的电压与跨第二电熔丝串的电压进行比较，以确定电子熔丝串的编程状态， 保险丝系统
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公开(公告)号：US08189419B2
公开(公告)日：2012-05-29
申请号：US12498175
申请日：2009-07-06
申请人： Howard H. Chen , John A. Fifield , Louis C. Hsu
发明人： Howard H. Chen , John A. Fifield , Louis C. Hsu
IPC分类号： G11C17/18
摘要： Electronic fuse (e-fuse) systems with multiple reprogrammability are provided. In one aspect, a reprogrammable e-fuse system is provided that includes a first e-fuse string; a second e-fuse string; a selector connected to both the first e-fuse string and the second e-fuse string configured to alternately select an e-fuse from the first e-fuse string or the second e-fuse string to be programmed; and a comparator connected to both the first e-fuse string and the second e-fuse string configured to compare a voltage across the first e-fuse string to a voltage across the second e-fuse string to determine a programming state of the e-fuse system.
摘要翻译： 提供具有多重重新编程能力的电子保险丝（e-fuse）系统。 在一个方面，提供了一种可再编程电子熔丝系统，其包括第一电熔丝串; 第二个电熔丝串; 连接到第一电熔丝串和第二电熔丝串的选择器，被配置为交替地从要编程的第一电熔丝串或第二电熔丝串中选择电熔丝; 以及连接到第一电熔丝串和第二电熔丝串两者的比较器，被配置为将第一电熔丝串两端的电压与第二电熔丝串的电压进行比较，以确定电子熔丝串的编程状态， 保险丝系统
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公开(公告)号：US06910165B2
公开(公告)日：2005-06-21
申请号：US09795899
申请日：2001-02-28
申请人： Howard H. Chen , Li-Kong Wang , Louis L. Hsu , Sang H. Dhong , Tin-chee Lo
发明人： Howard H. Chen , Li-Kong Wang , Louis L. Hsu , Sang H. Dhong , Tin-chee Lo
CPC分类号： H03K3/84 , G01R31/2841
摘要： A system and method for generating random noise for use in testing electronic devices comprises a first random pattern generator circuit for generating first sets of random bit pattern signals; one or more delay devices each receiving a trigger input signal and a random bit pattern signal set for generating in response a respective delay output signal, each delay output signal being delayed in time with respect to a respective trigger signal, a delay time being determined by the bit pattern set received; and, an oscillator circuit device associated with a respective one or more delay devices for receiving a respective delay output signal therefrom and generating a respective oscillating signal, each oscillator signal generated being used to generate artificial random noise for emulating a real noise environment in an electronic device. A second random pattern generator circuit may be provided for generating second sets of random bit pattern signals for receipt by each of the associated oscillator circuit devices in order to frequency adjust in a random manner, each of the oscillator signals.
摘要翻译： 用于产生用于测试电子设备的随机噪声的系统和方法包括：第一随机模式发生器电路，用于产生第一组随机位模式信号; 每个接收触发输入信号的一个或多个延迟装置和随机位模式信号组，用于响应于相应的延迟输出信号而产生，每个延迟输出信号相对于相应的触发信号在时间上延迟，延迟时间由 接收到位模式集; 以及与相应的一个或多个延迟装置相关联的振荡器电路装置，用于从其接收相应的延迟输出信号并产生相应的振荡信号，所产生的每个振荡器信号用于产生人造随机噪声，以仿真电子中的实际噪声环境 设备。 可以提供第二随机模式发生器电路，用于产生第二组随机位模式信号，以便由每个相关联的振荡器电路装置接收，以便随机地调整每个振荡器信号。
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公开(公告)号：US06728916B2
公开(公告)日：2004-04-27
申请号：US09863952
申请日：2001-05-23
申请人： Howard H. Chen , Louis L. Hsu , Li-Kong Wang
发明人： Howard H. Chen , Louis L. Hsu , Li-Kong Wang
IPC分类号： G01R3128
CPC分类号： G06F11/27
摘要： Hierarchical built-in self-test methods and arrangement for verifying system functionality. As a result, an effective built-in self-test methodology is provided for conducting complete system-on-chip testing, to ensure both the circuit reliability and performance of system-on-chip design. As an added advantage, development costs are reduced for system-on-chip applications.
摘要翻译： 分层内置的自检方法和安排，用于验证系统功能。 因此，提供了一种有效的内置自检方法，用于进行完整的片上系统测试，以确保片上系统设计的电路可靠性和性能。 作为一个额外的优势，系统级芯片应用程序的开发成本有所降低。
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公开(公告)号：US20110019321A1
公开(公告)日：2011-01-27
申请号：US12508665
申请日：2009-07-24
申请人： Howard H. Chen , Kai D. Feng , Louis L. Hsu , Seongwon Kim
发明人： Howard H. Chen , Kai D. Feng , Louis L. Hsu , Seongwon Kim
CPC分类号： G01R31/024 , G01R31/028
摘要： A high-density deep trench capacitor array with a plurality of leakage sensors and switch devices. Each capacitor array further comprises a plurality of sub-arrays, wherein the leakage in each sub-array is independently controlled by a sensor and switch unit. The leakage sensor comprises a current mirror, a transimpedance amplifier, a voltage comparator, and a timer. If excessive leakage current is detected, the switch unit will automatically disconnect the leaky capacitor module to reduce stand-by power and improve yield. An optional solid-state resistor can be formed on top of the deep trench capacitor array to increase the temperature and speed up the leakage screening process.
摘要翻译： 一种高密度深沟槽电容阵列，具有多个漏电传感器和开关器件。 每个电容器阵列还包括多个子阵列，其中每个子阵列中的泄漏由传感器和开关单元独立地控制。 泄漏传感器包括电流镜，跨阻放大器，电压比较器和定时器。 如果检测到过大的漏电流，开关单元将自动断开泄漏电容器模块，以降低待机功率并提高产量。 可以在深沟槽电容器阵列的顶部形成可选的固态电阻器，以增加温度并加快泄漏检测过程。
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10.发明授权Semiconductor device on a combination bulk silicon and silicon-on-insulator (SOI) substrate 有权组合体硅和绝缘体上硅（SOI）衬底上的半导体器件公开(公告)号：US06825534B2
公开(公告)日：2004-11-30
申请号：US09748256
申请日：2000-12-27
申请人： Howard H. Chen , Louis L. Hsu , Li-Kong Wang
发明人： Howard H. Chen , Louis L. Hsu , Li-Kong Wang
IPC分类号： H01L2701
CPC分类号： H01L21/76264 , H01L21/02381 , H01L21/0243 , H01L21/02532 , H01L21/02675 , H01L21/02689 , H01L21/2022 , H01L21/76283 , H01L21/84
摘要： A semiconductor device includes a combination substrate having a bulk silicon region, and a silicon-on-insulator (SOI) region. The SOI region includes a crystallized silicon layer formed by annealing amorphous silicon and having isolation trenches formed therein so as to remove defective regions, and isolation oxides formed in the isolation trenches.
摘要翻译： 半导体器件包括具有体硅区域和绝缘体上硅（SOI）区域的组合衬底。 SOI区域包括由非晶硅退火形成的结晶硅层，并且在其中形成有隔离沟槽，以去除不良区域，以及在隔离沟槽中形成隔离氧化物。
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