公开(公告)号：US07991102B2

公开(公告)日：2011-08-02

申请号：US11858886

申请日：2007-09-20

申请人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

IPC分类号： H03D3/24

CPC分类号： H03L7/1976 ,  H03L7/085

摘要： A signal generating apparatus includes: a test data generator for generating a test data; a fractional-N phase-locked loop device coupled to the test data generator for generating a synthesized signal according to the test data when the test data is received; and a calibrating device coupled to the fractional-N phase-locked loop device for measuring power of the synthesized signal to generate a calibration signal utilized for adjusting the fractional-N phase-locked loop device.

摘要翻译： 信号发生装置包括：测试数据发生器，用于产生测试数据; 耦合到测试数据发生器的分数N锁相环装置，用于当接收到测试数据时根据测试数据产生合成信号; 以及耦合到分数N锁相环装置的校准装置，用于测量合成信号的功率，以产生用于调整分数N锁相环装置的校准信号。

公开(公告)号：US07486118B2

公开(公告)日：2009-02-03

申请号：US11690144

申请日：2007-03-23

申请人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

IPC分类号： H03L7/06

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0991 ,  H03L7/1976

摘要： A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal. The signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a detecting device for detecting a reference signal to generate a calibrating signal; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered input signal; and a modulating device for modulating the filtered input signal in the normal operation mode and setting the dividing factor according to a first factor setting or a second factor setting in the calibration mode.

摘要翻译： 公开了一种根据输入信号产生合成信号的信号发生装置。 信号发生装置包括用于产生合成信号的锁相环装置; 用于检测参考信号以产生校准信号的检测装置; 滤波装置，用于根据校准信号对输入信号进行滤波和校准输入信号，以产生经滤波的输入信号; 以及调制装置，用于在正常操作模式下调制滤波后的输入信号，并根据校准模式中的第一因素设置或第二因素设置设置分频因子。

公开(公告)号：US20080157823A1

公开(公告)日：2008-07-03

申请号：US11616933

申请日：2006-12-28

申请人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

发明人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

IPC分类号： H03B5/00 ,  H03M3/02

CPC分类号： H03L7/1976

摘要： A dynamic carrying method to prevent saturation of a sigma-delta modulator of a phase locked loop frequency synthesizer. The phase locked loop frequency synthesizer using the dynamic carrying method comprises a forward portion receiving a reference frequency signal and a first frequency signal to generate an output carrier signal; a multi-modulus divider dividing the output carrier signal frequency to generate the first frequency signal; a dynamic carrying device receiving and separating transmitting data into a carrying part and a residue part when the transmitting data amplitude exceeds a threshold; a sigma-delta modulator receiving the residue part to generate a first modulus control signal; an auxiliary modulator receiving the carrying part to generate a second modulus control signal; and a first adder receiving the first modulus control signal, the second modulus control signal, and a third modulus control signal and outputting a modulus modulation signal to modulate the multi-modulus divider.

摘要翻译： 一种防止锁相环频率合成器的Σ-Δ调制器饱和的动态传输方法。 使用动态携带方法的锁相环频率合成器包括：接收参考频率信号的前向部分和第一频率信号，以产生输出载波信号; 分割所述输出载波信号频率以产生所述第一频率信号的多模式分频器; 当发送数据幅度超过阈值时，动态承载装置接收和分离发送数据到携带部分和剩余部分; 接收所述残余部分以生成第一模数控制信号的Σ-Δ调制器; 接收所述承载部分以产生第二模数控制信号的辅助调制器; 以及第一加法器，接收第一模数控制信号，第二模数控制信号和第三模数控制信号，并输出模调制信号以调制多模式分配器。

公开(公告)号：US07634041B2

公开(公告)日：2009-12-15

申请号：US11616933

申请日：2006-12-28

申请人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

发明人： Tai Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin ,  Hsin-Hung Chen

IPC分类号： H04D3/24

CPC分类号： H03L7/1976

摘要： A dynamic carrying method to prevent saturation of a sigma-delta modulator of a phase locked loop frequency synthesizer. The phase locked loop frequency synthesizer using the dynamic carrying method comprises a forward portion receiving a reference frequency signal and a first frequency signal to generate an output carrier signal; a multi-modulus divider dividing the output carrier signal frequency to generate the first frequency signal; a dynamic carrying device receiving and separating transmitting data into a carrying part and a residue part when the transmitting data amplitude exceeds a threshold; a sigma-delta modulator receiving the residue part to generate a first modulus control signal; an auxiliary modulator receiving the carrying part to generate a second modulus control signal; and a first adder receiving the first modulus control signal, the second modulus control signal, and a third modulus control signal and outputting a modulus modulation signal to modulate the multi-modulus divider.

摘要翻译： 一种防止锁相环频率合成器的Σ-Δ调制器饱和的动态传输方法。 使用动态携带方法的锁相环频率合成器包括：接收参考频率信号的前向部分和第一频率信号，以产生输出载波信号; 分割所述输出载波信号频率以产生所述第一频率信号的多模式分频器; 当发送数据幅度超过阈值时，动态承载装置接收和分离发送数据到携带部分和剩余部分; 接收所述残余部分以生成第一模数控制信号的Σ-Δ调制器; 接收所述承载部分以产生第二模数控制信号的辅助调制器; 以及第一加法器，接收第一模数控制信号，第二模数控制信号和第三模数控制信号，并输出模调制信号以调制多模除法器。

公开(公告)号：US20090080563A1

公开(公告)日：2009-03-26

申请号：US11858886

申请日：2007-09-20

申请人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Ling-Wei Ke ,  Tai-Yuan Yu ,  Tser-Yu Lin

IPC分类号： H03K9/06 ,  H03K7/06

CPC分类号： H03L7/1976 ,  H03L7/085

摘要： A signal generating apparatus is disclosed. The signal generating apparatus includes a test data generator for generating a test data; a fractional-N phase-locked loop device coupled to the test data generator for generating a synthesized signal according to the test data when the test data is received; and a calibrating device coupled to the fractional-N phase-locked loop device for measuring power of the synthesized signal to generate a calibration signal utilized for adjusting the fractional-N phase-locked loop device.

摘要翻译： 公开了一种信号发生装置。 信号发生装置包括用于产生测试数据的测试数据发生器; 耦合到测试数据发生器的分数N锁相环装置，用于当接收到测试数据时根据测试数据产生合成信号; 以及耦合到分数N锁相环装置的校准装置，用于测量合成信号的功率，以产生用于调整分数N锁相环装置的校准信号。

公开(公告)号：US20080272811A1

公开(公告)日：2008-11-06

申请号：US11690144

申请日：2007-03-23

申请人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

发明人： Hsin-Hung Chen ,  Tai-Yuan Yu ,  Ling-Wei Ke ,  Tser-Yu Lin

IPC分类号： H03L7/06

CPC分类号： H03C3/0925 ,  H03C3/0933 ,  H03C3/0991 ,  H03L7/1976

摘要： A signal generating apparatus is disclosed for generating a synthesized signal according to an input signal. The signal generating apparatus includes a phase-locked loop device for generating the synthesized signal; a detecting device for detecting a reference signal to generate a calibrating signal; a filtering device for filtering the input signal and calibrating the input signal according to the calibrating signal to generate a filtered input signal; and a modulating device for modulating the filtered input signal in the normal operation mode and setting the dividing factor according to a first factor setting or a second factor setting in the calibration mode.

摘要翻译： 公开了一种根据输入信号产生合成信号的信号发生装置。 信号发生装置包括用于产生合成信号的锁相环装置; 用于检测参考信号以产生校准信号的检测装置; 滤波装置，用于根据校准信号对输入信号进行滤波和校准输入信号，以产生经滤波的输入信号; 以及调制装置，用于在正常操作模式下调制滤波后的输入信号，并根据校准模式中的第一因素设置或第二因素设置设置分频因子。

公开(公告)号：US20090072911A1

公开(公告)日：2009-03-19

申请号：US11855161

申请日：2007-09-14

申请人： Ling-Wei Ke ,  Tai-Yuan Yu ,  Hsin-Hung Chen ,  Tser-Yu Lin

发明人： Ling-Wei Ke ,  Tai-Yuan Yu ,  Hsin-Hung Chen ,  Tser-Yu Lin

IPC分类号： H03L7/087 ,  H03L7/08 ,  H03L7/085

CPC分类号： H03L7/0898 ,  H03L7/087 ,  H03L7/113 ,  H03L7/18

摘要： A signal generating apparatus is disclosed. The signal generating apparatus includes a phase-locked loop device for generating a synthesized signal, wherein the phase-locked loop device includes a phase detector, a charge pump device, a filtering device, a controllable oscillator, and a switch device coupled to the controllable oscillator for selectively coupling the controllable oscillator to the filtering device or a tuning reference signal; a calibration controller generates a tuning reference signal and controls the switch device; and a first calibrator tunes the controllable oscillator into a predetermined sub-band according to a reference oscillating signal and a synthesized signal when the switch device couples the controllable oscillator to the tuning reference signal of the calibration controller.

摘要翻译： 公开了一种信号发生装置。 信号发生装置包括用于产生合成信号的锁相环装置，其中锁相环装置包括相位检测器，电荷泵装置，滤波装置，可控振荡器和耦合到可控制的开关装置 用于选择性地将可控振荡器耦合到滤波装置的振荡器或调谐参考信号; 校准控制器产生调谐参考信号并控制开关装置; 并且当开关装置将可控振荡器耦合到校准控制器的调谐参考信号时，第一校准器根据参考振荡信号和合成信号将可控振荡器调谐成预定子带。

公开(公告)号：US20080272851A1

公开(公告)日：2008-11-06

申请号：US11800403

申请日：2007-05-04

申请人： Tser-Yu Lin ,  Ling-Wei Ke ,  Tai-Yuan Yu

发明人： Tser-Yu Lin ,  Ling-Wei Ke ,  Tai-Yuan Yu

IPC分类号： H03J3/20 ,  H03B7/02 ,  H03B7/06 ,  H03J3/04

CPC分类号： H03B5/1228 ,  H03B5/1212 ,  H03B5/124 ,  H03B5/1265 ,  H03B5/1293

摘要： A tunable capacitance unit coupled between a pair of circuit nodes. The tunable capacitance unit comprises a tuning input supplying a tuning voltage, and first and second tuning capacitance units. Each of the tuning capacitance units comprises a pair of accumulation-mode MOS varactors with source/drains thereof coupled to the tuning input, a pair of blocking capacitors coupled to a respective gate of the accumulation-mode MOS varactors and to a respective one of the circuit nodes, and a pair of biasing resistors coupled to a respective gate of the accumulation-mode MOS varactors and to a respective bias terminal receiving a respective reference voltage. The reference voltages received by the first and second tuning capacitance units are symmetrical to a predetermined voltage.

摘要翻译： 耦合在一对电路节点之间的可调电容单元。 可调谐电容单元包括提供调谐电压的调谐输入以及第一和第二调谐电容单元。 每个调谐电容单元包括一对累加模式MOS可变电抗器，其源极/漏极耦合到调谐输入端，耦合到累积模式MOS可变电抗器的相应栅极的一对隔离电容器和 电路节点和耦合到累积模式MOS可变电抗器的相应栅极的一对偏置电阻器以及接收相应参考电压的相应偏置端子。 由第一调谐电容单元和第二调谐电容单元接收的参考电压与预定电压对称。

公开(公告)号：US20070132491A1

公开(公告)日：2007-06-14

申请号：US11164956

申请日：2005-12-12

申请人： Chang-Fu Kuo ,  Tser-Yu Lin

发明人： Chang-Fu Kuo ,  Tser-Yu Lin

IPC分类号： H03L7/06

CPC分类号： H03L7/0898

摘要： The present invention provides a charge pump in a phase lock loop circuit. The phase lock loop circuit comprises a voltage controlled oscillator (VCO) for producing a variable frequency output signal in response to a VCO control voltage. The charge pump comprises a current generating module for providing a first current, a second circuit for providing a bias current according to a bias control signal, a current mirror circuit that comprises a first current generating unit for generating a third current proportional to a sum of the first current and the second current, and a second current generating unit for generating a fourth current proportional to the sum of the first current and the second current, a first switch for sourcing the third current according to a first control signal and a second switch for sinking the fourth current according to a second control signal.

摘要翻译： 本发明提供一种锁相环电路中的电荷泵。 锁相环电路包括用于响应于VCO控制电压产生可变频率输出信号的压控振荡器（VCO）。 电荷泵包括用于提供第一电流的电流产生模块，用于根据偏置控制信号提供偏置电流的第二电路;电流镜电路，包括第一电流产生单元，用于产生与第一电流成正比的第三电流 第一电流和第二电流;以及第二电流产生单元，用于产生与第一电流和第二电流的和成比例的第四电流;第一开关，用于根据第一控制信号提供第三电流;以及第二开关 用于根据第二控制信号吸收第四电流。

公开(公告)号：US20110278699A1

公开(公告)日：2011-11-17

申请号：US13195035

申请日：2011-08-01

申请人： Tser-Yu Lin

发明人： Tser-Yu Lin

IPC分类号： H01L29/92 ,  H01G4/228

CPC分类号： H01L23/5223 ,  H01L28/86 ,  H01L28/90 ,  H01L2924/0002 ,  H01L2924/00

摘要： A capacitor includes a first metal plate; a second metal plate in close proximity to the first metal plate; a third metal plate in close proximity to the first metal plate, and at least one dielectric layer interposed between the first, second and three vertical metal plates. The first, second and third metal plate are connected to three different terminals of an integrated circuit.

摘要翻译： 电容器包括第一金属板; 靠近第一金属板的第二金属板; 靠近第一金属板的第三金属板和介于第一，第二和三个垂直金属板之间的至少一个电介质层。 第一，第二和第三金属板连接到集成电路的三个不同的端子。