Interconnection System, and Interconnection Control Method and Apparatus

    公开(公告)号:US20200065291A1

    公开(公告)日:2020-02-27

    申请号:US16673253

    申请日:2019-11-04

    Abstract: An interconnection system including a first gating unit and a second gating unit is provided. The first gating unit includes two terminals, with one terminal connecting to a first CPU directly, where the two terminals are indirectly connected when the first gating unit is in a first state. The second gating unit includes two terminals, with one terminal connecting to a second CPU, where the two terminals are connected when the second gating unit is in the first state. Another terminal of the first gating unit is connected to another terminal of the second gating unit. If both the first gating unit and the second gating unit are in the first state, the first CPU is connected to the second CPU.

    Interconnection system, and interconnection control method and apparatus

    公开(公告)号:US11100039B2

    公开(公告)日:2021-08-24

    申请号:US16673253

    申请日:2019-11-04

    Abstract: An interconnection system including a first gating unit and a second gating unit is provided. The first gating unit includes two terminals, with one terminal connecting to a first CPU directly, where the two terminals are indirectly connected when the first gating unit is in a first state. The second gating unit includes two terminals, with one terminal connecting to a second CPU, where the two terminals are connected when the second gating unit is in the first state. Another terminal of the first gating unit is connected to another terminal of the second gating unit. If both the first gating unit and the second gating unit are in the first state, the first CPU is connected to the second CPU.

    MEMORY EVALUATION METHOD AND APPARATUS
    7.
    发明申请

    公开(公告)号:US20200210270A1

    公开(公告)日:2020-07-02

    申请号:US16816597

    申请日:2020-03-12

    Inventor: Zheng Ye Fei Zhang

    Abstract: A memory evaluation method and apparatus are provided. The method includes: determining a health degree evaluation model indicating a relationship in which a health degree of a memory changes with at least one health degree influencing factor of the memory; obtaining at least one running parameter value corresponding to each of the at least one health degree influencing factor; separately matching the at least one running parameter value corresponding to each health degree influencing factor to the health degree evaluation model, to obtain the health degree of the memory; and outputting health degree indication information which indicate whether the memory needs to be replaced. Therefore, the memory is not faulty and the health degree of the memory is a relatively low, a user is prompted to replace the memory.

    Memory Fault Detection
    8.
    发明申请

    公开(公告)号:US20200159635A1

    公开(公告)日:2020-05-21

    申请号:US16748274

    申请日:2020-01-21

    Abstract: A memory fault detection method includes: receiving a first interrupt signal sent when a count value of a first leaky bucket counter of a server reaches a first threshold; disabling an interrupt switch of the first leaky bucket counter; enabling the interrupt switch of the first leaky bucket counter after the interrupt switch of the first leaky bucket counter has been disabled for a preset time and the count value of the first leaky bucket counter is reset to zero; receiving a second interrupt signal sent when a count value of a second leaky bucket counter reaches a second threshold; if the second leaky bucket counter and the first leaky bucket counter are a same leaky bucket counter, and the second rank and a first rank are a same rank, determining that a hardware fault occurs in the first rank.

    Memory evaluation method and apparatus

    公开(公告)号:US11868201B2

    公开(公告)日:2024-01-09

    申请号:US17741765

    申请日:2022-05-11

    Inventor: Zheng Ye Fei Zhang

    CPC classification number: G06F11/0772 G06F11/073 G06F11/076

    Abstract: A memory evaluation method includes determining a health degree evaluation model indicating a relationship in which a health degree of a memory changes with at least one health degree influencing factor of the memory; obtaining at least one running parameter value corresponding to each of the at least one health degree influencing factor; separately matching the at least one running parameter value corresponding to each health degree influencing factor to the health degree evaluation model, to obtain the health degree of the memory; and outputting health degree indication information indicating whether the memory needs to be replaced.

    Memory evaluation method and apparatus

    公开(公告)号:US11354183B2

    公开(公告)日:2022-06-07

    申请号:US16816597

    申请日:2020-03-12

    Inventor: Zheng Ye Fei Zhang

    Abstract: A memory evaluation method and apparatus are provided. The method includes: determining a health degree evaluation model indicating a relationship in which a health degree of a memory changes with at least one health degree influencing factor of the memory; obtaining at least one running parameter value corresponding to each of the at least one health degree influencing factor; separately matching the at least one running parameter value corresponding to each health degree influencing factor to the health degree evaluation model, to obtain the health degree of the memory; and outputting health degree indication information which indicate whether the memory needs to be replaced. Therefore, the memory is not faulty and the health degree of the memory is a relatively low, a user is prompted to replace the memory.

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