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公开(公告)号：US20090133811A1
公开(公告)日：2009-05-28
申请号：US12276125
申请日：2008-11-21
摘要： A process of transferring a layer of a first material from a first substrate, having defects in a zone close to the surface, onto a host substrate made of a second material includes a step of thinning the first substrate in order to form a first thinned substrate, an ion or atom implantation in the first substrate in order to form an implantation plane therein, delimiting the layer to be transferred, and a transfer of the layer onto the host substrate by fracturing the substrate along the implantation plane.
摘要翻译： 将具有靠近表面的区域中的缺陷的第一材料层转移到由第二材料制成的主体衬底上的工艺包括使第一衬底变薄以形成第一薄化衬底的步骤 在第一衬底中的离子或原子注入，以便在其中形成注入平面，限定待转移的层，以及通过沿着注入平面压裂衬底将层转移到主衬底上。
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公开(公告)号：US08303745B2
公开(公告)日：2012-11-06
申请号：US12276125
申请日：2008-11-21
IPC分类号： B32B38/10
摘要： A process of transferring a layer of a first material from a first substrate, having defects in a zone close to the surface, onto a host substrate made of a second material includes a step of thinning the first substrate in order to form a first thinned substrate, an ion or atom implantation in the first substrate in order to form an implantation plane therein, delimiting the layer to be transferred, and a transfer of the layer onto the host substrate by fracturing the substrate along the implantation plane.
摘要翻译： 将具有靠近表面的区域中的缺陷的第一材料层转移到由第二材料制成的主体衬底上的工艺包括使第一衬底变薄以形成第一薄化衬底的步骤 在第一衬底中的离子或原子注入，以便在其中形成注入平面，限定待转移的层，以及通过沿着注入平面压裂衬底将层转移到主衬底上。
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公开(公告)号：US08501026B2
公开(公告)日：2013-08-06
申请号：US13377319
申请日：2010-06-17
申请人： Christophe Constancias , Bernard Dalzotto , Frank Fournel , Philippe Michallon , Hubert Moriceau , Valerie Pouteau
发明人： Christophe Constancias , Bernard Dalzotto , Frank Fournel , Philippe Michallon , Hubert Moriceau , Valerie Pouteau
CPC分类号： B81C1/00158 , B81B2201/0264 , B81B2201/047 , B81C2201/017
摘要： A method for determining a minimum tension compensation stress which will have a membrane of a thickness of less than or equal to one micrometer, secured to a frame, having, in the absence of any external stress, a desired deflection. The membrane can be made as planar as possible in absence of any external stress, and its thickness can be less than or equal to one micrometer.
摘要翻译： 一种用于确定最小张力补偿应力的方法，其将具有小于或等于1微米厚度的膜，固定到框架，在没有任何外部应力的情况下具有期望的偏转。 膜可以在没有任何外部应力的情况下制成尽可能平坦的，并且其厚度可以小于或等于1微米。
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4.发明申请PHOTOVOLTAIC CELL, INCLUDING A CRYSTALLINE SILICON OXIDE PASSIVATION THIN FILM, AND METHOD FOR PRODUCING SAME 审中-公开包括晶体氧化硅钝化薄膜的光电池及其制造方法公开(公告)号：US20120291861A1
公开(公告)日：2012-11-22
申请号：US13522901
申请日：2011-01-26
IPC分类号： H01L31/077 , H01L31/0352 , H01L31/18 , H01L31/075
CPC分类号： H01L31/0745 , H01L31/0747 , H01L31/1868 , Y02E10/50 , Y02P70/521
摘要： A heterojunction photovoltaic cell includes at least one crystalline silicon oxide film directly placed onto one of the front or rear faces of a crystalline silicon substrate, between said substrate and a layer of amorphous or microcrystalline silicon. The thin film is intended to enable the passivation of said face of the substrate. The thin film is more particularly obtained by radically oxidizing a surface portion of the substrate, before depositing the layer of amorphous silicon. Moreover, a thin layer of intrinsic or microdoped amorphous silicon can be placed between said think film and the layer of amorphous or microcrystalline silicon.
摘要翻译： 异质结光伏电池包括直接放置在晶体硅衬底的前表面或后表面之一上的至少一个晶体氧化硅膜，位于所述衬底和非晶或微晶硅层之间。 薄膜旨在使得能够钝化基底的所述面。 在沉积非晶硅层之前，更特别地通过对衬底的表面部分进行自由基氧化来获得薄膜。 此外，可以在所述思维膜和非晶或微晶硅层之间放置本征或微掺杂非晶硅的薄层。
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公开(公告)号：US08207048B2
公开(公告)日：2012-06-26
申请号：US11612829
申请日：2006-12-19
申请人： Franck Fournel , Hubert Moriceau , Chrystel Deguet
发明人： Franck Fournel , Hubert Moriceau , Chrystel Deguet
CPC分类号： H01L21/2007 , B81C1/00031 , H01L21/76254
摘要： Method for producing nanostructures comprising: a step of providing a substrate (100) having a buried barrier layer (2) and above said barrier layer (2) a crystalline film (5) provided with a network of crystalline defects and/or stress fields (12) in a crystalline zone (13), one or several steps of attacking the substrate (100), of which a preferential attack either of the crystalline defects and/or the stress fields, or the crystalline zone (13) between the crystalline defects and/or the stress fields, said attack steps enabling the barrier layer (2) to be laid bared locally and protrusions (7) to be formed on a nanometric scale, separated from each other by hollows (7.1) having a base located in the barrier layer, the protrusions leading to nanostructures (7, 8).
摘要翻译： 一种生产纳米结构的方法，包括：提供具有掩埋阻挡层（2）和所述阻挡层（2）上方的衬底（100）的步骤，所述结晶膜（5）具有晶体缺陷和/或应力场网络 12）在结晶区域（13）中，攻击衬底（100）的一个或几个步骤，其中晶体缺陷和/或应力场的优先攻击或晶体缺陷之间的结晶区域（13） 和/或应力场，所述攻击步骤使得阻挡层（2）能够局部放置并且以纳米尺度形成突起（7），所述突起（7）通过具有位于 阻挡层，导致纳米结构的突起（7,8）。
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6.发明授权Method of fabricating a mixed microtechnology structure and a structure obtained thereby 有权制造混合微技术结构的方法和由此获得的结构公开(公告)号：US07947564B2
公开(公告)日：2011-05-24
申请号：US11857130
申请日：2007-09-18
申请人： Marek Kostrzewa , Hubert Moriceau , Marc Zussy
发明人： Marek Kostrzewa , Hubert Moriceau , Marc Zussy
IPC分类号： H01L21/76
CPC分类号： H01L21/76254 , B81C1/00357
摘要： A method of fabricating a mixed microtechnology structure includes providing a provisional substrate including a sacrificial layer on which is formed a mixed layer including at least first patterns of a first material and second patterns of a second material different from the first material, where the first and second patterns reside adjacent the sacrificial layer. The sacrificial layer is removed exposing a mixed surface of the mixed layer, the mixed surface including portions of the first patterns and portions of the second patterns. A continuous is formed covering layer of a third material on the mixed surface by direct bonding.
摘要翻译： 制造混合微技术结构的方法包括提供包括牺牲层的临时衬底，其上形成有至少包括第一材料的第一图案和不同于第一材料的第二材料的第二图案的混合层，其中第一和 第二图案位于牺牲层附近。 消除牺牲层暴露混合层的混合表面，混合表面包括第一图案的部分和第二图案的部分。 连续地通过直接粘合在混合表面上形成第三材料的覆盖层。
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7.发明申请公开(公告)号：US20110092051A1
公开(公告)日：2011-04-21
申请号：US12977757
申请日：2010-12-23
IPC分类号： H01L21/302 , H01L21/306 , H01L21/31
CPC分类号： H01L21/76254 , H01L21/26506 , Y10S438/977
摘要： A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.
摘要翻译： 用于转移薄膜的方法包括形成夹杂物层以产生气态化合物的捕集阱。 夹杂物可以是一个或多个植入区域的形式，其作为被配置成捕获植入物种的限制层。 此外，夹杂物可以是通过化学气相沉积，外延生长，离子溅射或由任何上述方法形成的应力区域或层沉积的一个或多个层的形式。 夹杂物也可以是通过初始载体的热处理或通过任何上述方法形成的层的热处理形成的区域，或者通过蚀刻层中的空腔而形成的区域。 在随后的步骤中，将气体化合物引入到夹杂物层中以形成形成断裂平面的微空腔，通过该断裂平面可以将薄膜与基底的其余部分分离。
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公开(公告)号：US07906362B2
公开(公告)日：2011-03-15
申请号：US11630283
申请日：2005-06-29
IPC分类号： H01L21/00 , H01L21/30 , H01L21/46 , H01L21/31 , H01L21/469
CPC分类号： H01L27/14636 , H01L24/83 , H01L27/14634 , H01L33/0079 , H01L2224/83801 , H01L2224/83894 , H01L2924/01079 , H01L2924/01087 , H01L2924/07811 , Y10T29/49126 , H01L2924/3512 , H01L2924/00
摘要： An assembly method to enable local electrical bonds between zones located on a face of a first substrate and corresponding zones located on a face of a second substrate, the faces being located facing each other, at least one of the substrates having a surface topography. The method forms an intermediate layer including at least one burial layer on the face of the substrate or substrates having a surface topography to make it (them) compatible with molecular bonding of the faces of substrates to each other from a topographic point of view, resistivity and/or thickness of the intermediate layer being chosen to enable the local electrical bonds, brings the two faces into contact, the substrates positioned to create electrical bonds between areas on the first substrate and corresponding areas on the second substrate, and bonds the faces by molecular bonding.
摘要翻译： 一种组装方法，用于实现位于第一基板的表面上的区域和位于第二基板的表面上的对应区域之间的局部电粘合，所述表面彼此面对，所述基板中的至少一个具有表面形貌。 该方法形成中间层，其包括在基底的表面上的至少一个埋置层或具有表面形貌的基底，以使其（它们）与基底的表面的分子结合相互匹配，从地形的角度来看，电阻率 和/或中间层的厚度被选择以实现局部电接合，使两个面接触，所述基板被定位成在第一基板上的区域和第二基板上的对应区域之间产生电粘合，并且通过 分子键合。
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公开(公告)号：US20100200770A1
公开(公告)日：2010-08-12
申请号：US12678730
申请日：2008-09-16
CPC分类号： G01Q60/22 , B29D11/00009 , B29D11/00346 , G01Q70/12 , G11B7/1374 , G11B7/1387
摘要： The invention generally pertains to the field of solid immersion lenses for optical applications in high resolution microscopy. The lens of the invention includes a spherical sector limited by a planar surface and an object having nanometric dimensions arranged on the planar surface at the focus of said solid immersion lens. A light-opaque layer having a central opening with nanometric dimensions can be provided on the planar surface, said opening being centred on the focus of the solid immersion lens. The nano-object can be a tube or a thread having a cylindrical shape. The lens of the invention can be made using lithography techniques.
摘要翻译： 本发明一般涉及在高分辨率显微镜中用于光学应用的固体浸没透镜领域。 本发明的透镜包括由平面表面限制的球形部分和在所述固体浸没透镜的焦点处的平面表面上具有纳米尺寸的物体。 具有纳米尺寸的中心开口的不透光层可以设置在平坦表面上，所述开口以固体浸没透镜的焦点为中心。 纳米物体可以是具有圆柱形状的管或线。 本发明的透镜可以使用光刻技术制成。
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公开(公告)号：US20100167499A1
公开(公告)日：2010-07-01
申请号：US12628772
申请日：2009-12-01
IPC分类号： H01L21/762
CPC分类号： H01L21/67092 , H01L21/304 , H01L21/76254
摘要： A method of making a complex microelectronic structure by assembling two substrates through two respective linking surfaces, the structure being designed to be dissociated at a separation zone. Prior to assembly, in producing a state difference in the tangential stresses between the two surfaces to be assembled, the state difference is selected so as to produce in the assembled structure a predetermined stress state at the time of dissociation.
摘要翻译： 通过两个相应的连接表面组装两个基底来制造复杂的微电子结构的方法，该结构设计成在分离区离解。 在组装之前，为了产生要组装的两个表面之间的切向应力的状态差，选择状态差以便在组装结构中产生解离时的预定应力状态。
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