摘要:
A new method is provided of treating the wafer prior to the process of singulating the wafer into individual die. A first surface of the wafer over which CMOS image sensor devices have been created is coated with a layer of material that is non-soluble in water. The wafer is attached to a tape by bringing a second surface of the wafer in contact with the tape. The wafer is singulated by approaching the first surface of the wafer and by sawing first through the layer of material that has been coated over the first surface of the wafer and by then sawing through the wafer, stopping at the surface of the tape. A thorough water rinse is applied to the surface of the singulated wafer, followed by a wafer clean applying specific chemicals for this purpose. The singulated die is now removed from the tape and further processed by applying steps of die mount, wire bonding, surrounding the die in a mold compound and marking the package.
摘要:
A new method to form passivation openings in the manufacture of an integrated circuit device is achieved. The passivation openings have gradually sloping sidewalls that allow a protective tape to be completely removed without leaving adhesive residue. A semiconductor substrate is provided. A passivation layer is deposited. An organic photoresist layer is deposited overlying the passivation layer. The organic photoresist layer is patterned to expose the passivation layer in areas where passivation openings are planned. The organic photoresist layer is reflowed to create gradually sloping sidewalls on the organic photoresist layer. The passivation layer is etched through to from the passivation openings. The passivation openings are thereby formed with gradually sloping sidewalls. The organic photoresist layer is stripped away. A protective tape is applied overlying the passivation layer and the passivation openings. The protective tape is removed. The gradually sloping sidewalls on the passivation openings allow the protective tape to be completely removed without leaving adhesive residue in the manufacture of the integrated circuit device.
摘要:
A method for fabricating a microelectronic product provides for forming a planarizing layer upon a bond pad and a topographic feature, both formed laterally separated over a substrate. The planarizing layer is formed with a diminished thickness upon the bond pad such that it may be readily etched to expose the bond pad while employing as a mask an additional layer formed over the topographic feature but not over the bond pad. The method is particularly useful for forming color filter sensor image array optoelectronic products with attenuated bond pad corrosion.
摘要:
A new method is provided of treating the wafer prior to the process of singulating the wafer into individual die. A surface of the wafer over which CMOS image sensor devices have been created is coated with a layer of material that is non-soluble in water. The wafer is singulated by sawing through the layer of material that has been coated over the surface of the wafer and by then sawing through the wafer. The singulated die is then further processed by applying steps of die mount, wire bonding, surrounding the die in a mold compound and marking the package.
摘要:
Formation of integrated color filters for gain-ratio balanced semiconductor array imagers using a spectrophotometric feedback control loop to adjust layer thickness during the deposition process is disclosed. The fabrication sequence of G/R/B conventionally used in Prior Art has been changed to B/R/G or B/G/R to enable the process to adapt to yielding specified color gain-ratio values without the need for integrated circuit redesign. A high efficiency color filter process is demonstrated wherein the additional neutral-density attenuator layers and/or spacer layers required in Prior Art fabrication methods are eliminated. The disclosed process is shown to enable high-precision thickness control of the color filter layers. Blue coating lift-off problems and the steric effect associated with successive depositions of color layers having step-height variations are eliminated. Statistical process control (SPC) is optimized by calibration of the color balance gain-ratio using the product photodiode arrays and amplifier integrated circuits with a real-time spectrophotometric feedback control-loop during the dye or pigment layer deposition process.
摘要翻译:公开了用于增益比平衡的半导体阵列成像器的集成滤色器的形成,其使用分光光度反馈控制环来在沉积过程中调节层厚度。 现有技术中常规使用的G / R / B的制造顺序已经改变为B / R / G或B / G / R,以使该工艺适应于产生指定的颜色增益比值,而不需要集成电路重新设计 。 证明了高效率滤色器工艺,其中消除了现有技术制造方法中所需的附加中性密度衰减器层和/或间隔层。 所公开的过程被示出为使得能够对滤色器层进行高精度的厚度控制。 消除蓝色涂层剥离问题和与具有阶跃高度变化的彩色层的连续沉积相关的空间效应。 通过使用产品光电二极管阵列和放大器集成电路通过在染料或颜料层沉积过程中具有实时分光光度反馈控制环来校准色平衡增益比来优化统计过程控制(SPC)。
摘要:
A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.
摘要:
A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.
摘要:
A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectronic fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for lowcost, high volume manufacturing of CMOS and CCD color video cameras.
摘要:
The present invention features a method for forming micro lens arrays on light-sensitive or light-emitting semiconductor structures. A unique oxygen plasma etch “descum” step is performed prior to the lens reflow hardbake. In addition, a photo-sensitive planarization layer place immediately atop a color filter layer results in fewer process steps. The micro lens array thus formed has a minimal number of merged or collapsed lenses and residue on bond pad areas is significantly reduced.
摘要:
A method of clearing photoresist on a wafer edge, including the following steps. A wafer having a upper exposed conductive layer is provided. The wafer having a center, an edge and a ring-shaped area proximate the wafer edge. A photoresist layer is formed upon the exposed conductive layer. The photoresist layer is removed from within the ring-shaped area by a rinse process to expose the conductive layer within the ring-shaped area. An oxygen diffusion barrier layer is formed over the photoresist layer.