Cup rinse with a valvular ring
    1.
    发明授权
    Cup rinse with a valvular ring 失效
    杯子用阀瓣冲洗

    公开(公告)号:US6076569A

    公开(公告)日:2000-06-20

    申请号:US193513

    申请日:1998-11-17

    IPC分类号: B05C11/08 F16K15/14 B65B1/04

    CPC分类号: F16K15/147 B05C11/08

    摘要: A cup rinse with a valvular ring according to the invention is disclosed. The valvular ring has a plurality of valves in the center thereof. When an inlet tube is inserted through the valvular ring, the valves are forced to open thereby to allow a chemical liquid to flow into the cup resin via the inlet tube. Inversely when the inlet tube is completely pulled out of the valvular ring, the valves are tightly closed without a chemical liquid leakage. Accordingly, the cup rinse of the invention can prevent peripheral precision instruments, such as a motor, from damage by a leaky chemical liquid. Thus, the cup rinse of the invention cannot cause any unnecessary cost consumption.

    摘要翻译: 公开了根据本发明的用阀瓣冲洗的杯子。 瓣环在其中心具有多个阀。 当入口管插入阀瓣环时,阀被迫打开,从而允许化学液体通过入口管流入杯形树脂。 相反,当入口管完全拉出阀瓣环时,阀门被紧密关闭而没有化学液体泄漏。 因此,本发明的杯子冲洗可以防止诸如电动机的周边精密仪器被泄漏的化学液体损坏。 因此,本发明的杯子冲洗不能造成任何不必要的成本消耗。

    Speed controller with scales
    2.
    发明授权
    Speed controller with scales 失效
    速度控制器与秤

    公开(公告)号:US6015096A

    公开(公告)日:2000-01-18

    申请号:US181100

    申请日:1998-10-28

    IPC分类号: F16K37/00 B67D5/08

    摘要: A speed controller with scales according to the invention is used to adjust the amount of an air flow thereby to control the amount of a chemical liquid sprayed. The speed controller includes a housing, a controller body and a transparent tube. The controller body is partly inserted in the housing and has a rotary button located at one end thereof and outside the housing. The rotary button has a slot and an indicator thereon, wherein the indicator is located at one end of the slot. The transparent tube, having a vertical scale on the side thereof and a circular scale on the top circumference thereof, encloses the rotary button. In the invention, the position of the rotary button can be determined by reading the vertical scale and the circular scale so as to precisely control the amount of a chemical liquid sprayed, thereby increasing yield and improving engineering analysis.

    摘要翻译: 使用根据本发明的具有鳞片的速度控制器来调节空气流量从而控制喷射的化学液体的量。 速度控制器包括壳体,控制器主体和透明管。 控制器主体部分地插入壳体中,并且具有位于其一端和壳体外部的旋转按钮。 旋转按钮在其上具有狭槽和指示器,其中指示器位于狭槽的一端。 在其一侧具有垂直刻度的透明管和其顶部圆周上的圆形鳞片包围旋转按钮。 在本发明中,可以通过读取垂直刻度和圆形刻度来确定旋转按钮的位置,以精确地控制喷射的化学液体的量,从而提高产量并改进工程分析。

    Spray coating device
    3.
    发明授权
    Spray coating device 有权
    喷涂装置

    公开(公告)号:US6139636A

    公开(公告)日:2000-10-31

    申请号:US189846

    申请日:1998-11-12

    IPC分类号: B05B1/14 B05C11/08 B05B13/04

    CPC分类号: B05B1/14 B05C11/08

    摘要: A spray coating device for coating a rotating wafer according to the invention is disclosed. The spray coating device comprises a spray head having a plurality of spray holes which are located on one end thereof with more in number on both sides than on the center of the end for uniformly spraying a chemical liquid on the rotated wafer. Since spray holes are more in number on the both sides than on the center of the end, the rotated wafer can be uniformly spray coated with the chemical liquid even though several spray holes are congested.

    摘要翻译: 公开了一种用于涂覆根据本发明的旋转晶片的喷涂装置。 喷涂装置包括喷头,喷头具有多个喷孔,该多个喷孔位于其一端,其两侧的数量多于末端的中心,用于均匀地喷洒旋转的晶片上的化学液体。 由于喷孔在两侧的数量多于端部的中心,即使几个喷孔堵塞,旋转的晶片也可以均匀地喷涂有化学液体。

    Method of Elliptic Curve Cryptography Using EW-MOF on Scalar Multiplication
    4.
    发明申请
    Method of Elliptic Curve Cryptography Using EW-MOF on Scalar Multiplication 有权
    使用EW-MOF对标量乘法进行椭圆曲线加密的方法

    公开(公告)号:US20130163760A1

    公开(公告)日:2013-06-27

    申请号:US13446430

    申请日:2012-04-13

    IPC分类号: H04K1/00

    摘要: A method of elliptic curve cryptography (ECC) using the enhanced window-based mutual opposite form (EW-MOF) on scalar multiplication. First, an elliptic curve and a base point on the elliptic curve are selected. Next, essential pre-computed points for a selected window size are calculated. Then, a private key is randomly generated and the mutual opposite form (MOF) is used to convert the private key's binary representation into a signed binary representation. Finally, a public key is calculated by using the enhanced window (EW) method. By greatly reducing the number of essential pre-computed points, the EW-MOF reduces average key generation time (including pre-computation time).

    摘要翻译: 一种使用增强型窗口相互形式(EW-MOF)对标量乘法进行椭圆曲线密码术(ECC)的方法。 首先,选择椭圆曲线和椭圆曲线上的基点。 接下来,计算所选窗口大小的必要的预先计算的点。 然后,随机生成私钥,并使用相互相反的形式(MOF)将私钥的二进制表示转换为带符号的二进制表示。 最后,通过使用增强窗口(EW)方法计算公钥。 EW-MOF通过大大减少基本预先计算的点数,减少平均密钥生成时间(包括预计算时间)。

    Vertical transistor and array with vertical transistors
    5.
    发明授权
    Vertical transistor and array with vertical transistors 有权
    垂直晶体管和阵列与垂直晶体管

    公开(公告)号:US07968937B2

    公开(公告)日:2011-06-28

    申请号:US12236517

    申请日:2008-09-24

    IPC分类号: H01L29/66 H01L27/108

    摘要: A vertical transistor includes a substrate, a semiconductor structure, a gate, a gate dielectric layer, and a conductive layer. The semiconductor structure is disposed on the substrate and includes two vertical plates and a bottom plate. The bottom plate has an upper surface connected to bottoms of the two vertical plates and a bottom surface connected to the substrate. The gate surrounds the semiconductor structure to fill between the two vertical plates, and the gate is disposed around the two vertical plates. The gate dielectric layer is sandwiched in between the gate and the semiconductor structure, and the conductive layer is disposed on the semiconductor structure and electrically connected with tops of the two vertical plates.

    摘要翻译: 垂直晶体管包括衬底,半导体结构,栅极,栅极介电层和导电层。 半导体结构设置在基板上并且包括两个垂直板和底板。 底板具有连接到两个垂直板的底部的上表面和连接到基板的底表面。 栅极围绕半导体结构以填充在两个垂直板之间,并且栅极围绕两个垂直板设置。 栅介质层夹在栅极和半导体结构之间,导电层设置在半导体结构上并与两个垂直板的顶部电连接。

    Flash memory cell and fabrication thereof
    6.
    发明授权
    Flash memory cell and fabrication thereof 有权
    闪存单元及其制造

    公开(公告)号:US06906377B2

    公开(公告)日:2005-06-14

    申请号:US10250038

    申请日:2003-05-30

    摘要: A flash memory cell is described, including at least a substrate, a tunnel oxide layer, a floating gate, an insulating layer, a control gate and an inter-gate dielectric layer. The tunnel oxide layer is disposed on the substrate. The floating gate is disposed on the tunnel oxide layer, and is constituted by a first conductive layer on the tunnel oxide layer and a second conductive layer on the first conductive layer. The second conductive layer has a bottom lower than the top surface of the first conductive layer, and has a bowl-like cross section. The insulating layer is disposed between the floating gates, and each control gate is disposed on a floating gate with an inter-gate dielectric layer between them.

    摘要翻译: 描述闪存单元,其包括至少衬底,隧道氧化物层,浮动栅极,绝缘层,控制栅极和栅极间介电层。 隧道氧化物层设置在基板上。 浮置栅极设置在隧道氧化物层上,由隧道氧化物层上的第一导电层和第一导电层上的第二导电层构成。 第二导电层具有比第一导电层的顶表面低的底部,并且具有碗状横截面。 绝缘层设置在浮置栅极之间,并且每个控制栅极设置在浮置栅极之间,栅间电介质层之间。

    Method for fabricating memory device with buried digit lines and buried word lines
    7.
    发明授权
    Method for fabricating memory device with buried digit lines and buried word lines 有权
    具有埋地数字线和掩埋字线的存储器件的制造方法

    公开(公告)号:US08691680B2

    公开(公告)日:2014-04-08

    申请号:US13182450

    申请日:2011-07-14

    申请人: Kuo-Chen Wang

    发明人: Kuo-Chen Wang

    IPC分类号: H01L21/4763

    摘要: A method for fabricating a memory array includes providing a semiconductor substrate having thereon a plurality of line-shaped active areas and intermittent line-shaped trench isolation regions between the plurality of line-shaped active areas, which extend along a first direction; forming buried word lines extending along a second direction in the semiconductor substrate, the buried word lines intersecting with the line-shaped active areas and the intermittent line-shaped trench isolation regions, wherein the second direction is not perpendicular to the first direction; forming buried digit lines extending along a third direction in the semiconductor substrate, wherein the third direction is substantially perpendicular to the second direction; and forming storage nodes at storage node sites between the buried digit lines.

    摘要翻译: 一种用于制造存储器阵列的方法,包括提供其上具有多个线状有源区域的半导体衬底和沿着第一方向延伸的多个线状有源区域之间的间断的线状沟槽隔离区域; 在所述半导体衬底中形成沿第二方向延伸的掩埋字线,所述掩埋字线与所述线状有源区域和所述间歇线状沟槽隔离区域相交,其中所述第二方向不垂直于所述第一方向; 在所述半导体衬底中形成沿着第三方向延伸的掩埋数字线,其中所述第三方向基本上垂直于所述第二方向; 并在掩埋的数字线之间的存储节点处形成存储节点。

    METHOD FOR FABRICATING MEMORY DEVICE WITH BURIED DIGIT LINES AND BURIED WORD LINES
    8.
    发明申请
    METHOD FOR FABRICATING MEMORY DEVICE WITH BURIED DIGIT LINES AND BURIED WORD LINES 有权
    用BURIED数字线和BURIED字线制造存储器件的方法

    公开(公告)号:US20130015551A1

    公开(公告)日:2013-01-17

    申请号:US13182450

    申请日:2011-07-14

    申请人: Kuo-Chen Wang

    发明人: Kuo-Chen Wang

    IPC分类号: H01L21/768 H01L27/10

    摘要: A method for fabricating a memory array includes providing a semiconductor substrate having thereon a plurality of line-shaped active areas and intermittent line-shaped trench isolation regions between the plurality of line-shaped active areas, which extend along a first direction; forming buried word lines extending along a second direction in the semiconductor substrate, the buried word lines intersecting with the line-shaped active areas and the intermittent line-shaped trench isolation regions, wherein the second direction is not perpendicular to the first direction; forming buried digit lines extending along a third direction in the semiconductor substrate, wherein the third direction is substantially perpendicular to the second direction; and forming storage nodes at storage node sites between the buried digit lines.

    摘要翻译: 一种用于制造存储器阵列的方法,包括提供其上具有多个线状有源区域的半导体衬底和沿着第一方向延伸的多个线状有源区域之间的间断的线状沟槽隔离区域; 在所述半导体衬底中形成沿第二方向延伸的掩埋字线,所述掩埋字线与所述线状有源区域和所述间歇线状沟槽隔离区域相交,其中所述第二方向不垂直于所述第一方向; 在所述半导体衬底中形成沿着第三方向延伸的掩埋数字线,其中所述第三方向基本上垂直于所述第二方向; 并在掩埋的数字线之间的存储节点处形成存储节点。

    VERTICAL TRANSISTOR AND ARRAY WITH VERTICAL TRANSISTORS
    9.
    发明申请
    VERTICAL TRANSISTOR AND ARRAY WITH VERTICAL TRANSISTORS 有权
    垂直晶体管和阵列与垂直晶体管

    公开(公告)号:US20100038709A1

    公开(公告)日:2010-02-18

    申请号:US12236517

    申请日:2008-09-24

    IPC分类号: H01L27/088 H01L29/78

    摘要: A vertical transistor includes a substrate, a semiconductor structure, a gate, a gate dielectric layer, and a conductive layer. The semiconductor structure is disposed on the substrate and includes two vertical plates and a bottom plate. The bottom plate has an upper surface connected to bottoms of the two vertical plates and a bottom surface connected to the substrate. The gate surrounds the semiconductor structure to fill between the two vertical plates, and the gate is disposed around the two vertical plates. The gate dielectric layer is sandwiched in between the gate and the semiconductor structure, and the conductive layer is disposed on the semiconductor structure and electrically connected with tops of the two vertical plates.

    摘要翻译: 垂直晶体管包括衬底,半导体结构,栅极,栅极介电层和导电层。 半导体结构设置在基板上并且包括两个垂直板和底板。 底板具有连接到两个垂直板的底部的上表面和连接到基板的底表面。 栅极围绕半导体结构以填充在两个垂直板之间,并且栅极围绕两个垂直板设置。 栅介质层夹在栅极和半导体结构之间,导电层设置在半导体结构上并与两个垂直板的顶部电连接。

    Swing skateboard
    10.
    发明授权
    Swing skateboard 有权
    摇摆滑板

    公开(公告)号:US08523205B2

    公开(公告)日:2013-09-03

    申请号:US13173095

    申请日:2011-06-30

    IPC分类号: A63C17/01

    摘要: A swing skateboard includes a board body, a front roller unit and a rear roller unit. The front roller unit has a front roller fork rotatably disposed under a bottom face of the board body, and a front roller rotatably mounted on the front roller fork. The rear roller unit has a rear roller shaft mounted under the bottom face of the board body, and two rear rollers respectively rotatably disposed at two ends of the rear roller shaft. A user can wiggle his/her body to tilt the board body of the skateboard and laterally swing the front roller unit so as to control and move the skateboard forward.

    摘要翻译: 摇摆滑板包括板体,前辊单元和后辊单元。 前辊单元具有可旋转地设置在板主体的底面下方的前轮叉和可旋转地安装在前滚子叉上的前滚子。 后辊单元具有安装在板主体的底面下方的后辊轴和分别可旋转地设置在后辊轴的两端的两个后辊。 用户可以摆动他/她的身体来倾斜滑板的板体,并横向摆动前辊单元,以便向前控制和移动滑板。