公开(公告)号：US4812756A

公开(公告)日：1989-03-14

申请号：US89648

申请日：1987-08-26

申请人： Huntington W. Curtis ,  Min-Su Fung ,  Roger L. Verkuil

发明人： Huntington W. Curtis ,  Min-Su Fung ,  Roger L. Verkuil

IPC分类号： G01R31/26 ,  G01R15/16 ,  G01R31/28 ,  H01L21/66 ,  G01R31/00

CPC分类号： G01R31/2831 ,  G01R15/165

摘要： A contactless technique for semiconductor wafer testing comprising: depositing charges on the top surface of an insulator layer over the wafer to create an inverted surface with a depletion region and thereby a field-induced junction therebelow in the wafer, with an accumulated guard ring on the semiconductor surface therearound. The technique further includes the step of changing the depth to which the depletion region extends below the inverted semiconductor wafer surface to create a surface potential transient, and the step of measuring a parameter of the resultant surface potential transient. This technique may be utilized to make time retention and epi doping concentration measurements. It is especially advantageous for reducing the effects of surface leakage on these measurements. In a preferred embodiment, corona discharges are used to effect the charge deposition configuration. Either corona discharge or photon injection are used to change the depletion region depth.

公开(公告)号：US3974486A

公开(公告)日：1976-08-10

申请号：US565326

申请日：1975-04-07

申请人： Huntington W. Curtis ,  Roger L. Verkuil

发明人： Huntington W. Curtis ,  Roger L. Verkuil

IPC分类号： H01L29/78 ,  G11C11/35 ,  G11C11/39 ,  G11C11/412 ,  H01L21/331 ,  H01L21/8247 ,  H01L27/11 ,  H01L29/10 ,  H01L29/417 ,  H01L29/73 ,  H01L29/739 ,  H01L29/788 ,  H01L29/792 ,  H03K3/356 ,  G11C11/40

CPC分类号： H01L27/11 ,  G11C11/35 ,  G11C11/39 ,  G11C11/412 ,  H01L29/1087 ,  H01L29/417 ,  H01L29/7393 ,  H03K3/356

摘要： A novel solid state device which exhibits two-terminal negative resistance characteristics. The negative resistance characteristic may be readily shaped by external bias control, providing a wide range of oscillatory or bistable properties. The negative resistance characteristic is obtained by a novel means of device operation exploiting an electron hole pair multiplication effect which is enhanced by high substrate doping in conjunction with appropriate biasing of the junctions within the device.The device exhibits a bias voltage controlled small signal negative resistance region, i.e., the device has a unique feature, a negative slope over an adjustable portion of its V-I characteristic. Bistable action is obtained with a single device. In the first stable state ("off") of the device, power dissipation is zero. In the second stable state ("on") of the device, power dissipation is adjustable to less than one micro-watt.One embodiment of the device is a novel and unobvious modification of a known N channel FET structure. The device may be readily fabricated by using large scale integration techniques well known in present day FET technology.The novel solid state device has utility in at least the following applications: (1) high density non-refresh memory; (2) gated latch (as three terminal device); (3) astable, monostable and bistable devices; (4) level detector, and (5) small signal (linear) oscillatory circuit.

摘要翻译： 具有两端负电阻特性的新型固态器件。 负电阻特性可以通过外部偏置控制容易地成形，提供宽范围的振荡或双稳态特性。 负电阻特性是通过利用电子空穴对倍增效应的新型器件操作来获得的，该效应通过高衬底掺杂而增加，同时结合器件中的结的适当偏置。

公开(公告)号：US4390499A

公开(公告)日：1983-06-28

申请号：US292384

申请日：1981-08-13

申请人： Huntington W. Curtis ,  Robert M. Kellogg ,  Kerry W. Kissinger ,  Robert P. Mappes ,  Emery J. Stephans

发明人： Huntington W. Curtis ,  Robert M. Kellogg ,  Kerry W. Kissinger ,  Robert P. Mappes ,  Emery J. Stephans

IPC分类号： G01N21/07 ,  G01N35/04 ,  G01N35/00

CPC分类号： G01N21/07 ,  G01N2035/0436

摘要： Apparatus for carrying out in situ chemical analysis of biological fluids is disclosed. A test package adapted for use with spinning rotor includes a sample-compartment, an integral cuvette and compartments for prepackaged reagents. The latter are adapted to be introduced via breakable seals into the sample compartment which contains the sample to be analyzed. The sample and reagents are then introduced via another breakable seal into a cuvette. Under pneumatic and rotational forces, mixing and measuring are carried out in situ. The rotor includes a programmable pressure applying arrangement whereby the dispensing of reagents and the movement of the latter and sample into a cuvette are controlled. Optical measurements are then carried out in situ.

摘要翻译： 公开了用于进行生物流体原位化学分析的装置。 适用于旋转转子的测试包包括样品室，整体试管和用于预包装试剂的隔室。 后者适于通过可破坏的密封件引入到包含待分析样品的样品室中。 然后将样品和试剂通过另一个可破坏的密封件引入比色杯中。 在气动和旋转力的作用下，原位进行混合和测量。 转子包括可编程压力施加装置，从而控制试剂的分配和后者和样品的运动进入比色皿。 然后在原位进行光学测量。

公开(公告)号：US5621327A

公开(公告)日：1997-04-15

申请号：US409743

申请日：1995-03-24

申请人： Shinwu Chiang ,  Huntington W. Curtis ,  Arthur E. Falls ,  Arnold Halperin ,  John P. Karidis ,  John D. Mackay ,  Danny C.-Y. Wong ,  Ka-Chiu Woo ,  Li-Cheng Zai

发明人： Shinwu Chiang ,  Huntington W. Curtis ,  Arthur E. Falls ,  Arnold Halperin ,  John P. Karidis ,  John D. Mackay ,  Danny C.-Y. Wong ,  Ka-Chiu Woo ,  Li-Cheng Zai

IPC分类号： G01R31/02 ,  G01R31/28 ,  G01R27/26

CPC分类号： G01R31/2805

摘要： Apparatus and method are disclosed for performing testing and fault isolation of high density passive boards and substrates. Using a small number of moving probes, simultaneous network resistance and network capacitance measurements may be performed. Thus, test time is minimized by eliminating the need for electrical switching and/or excessive probe movement during the test of a normal circuit board network. Simultaneous network capacitance and network leakage measurement are also achieved using phase-sensitive detection. Dual-frequency measurement techniques allow the measurement of both the capacitance value and resistance value of a leakage path between a network being measured and an unknown network. Any leakage resistance between a network under test and ground or power planes within the circuit board may also be determined from the measurements. Simultaneous independent net-to-plane capacitance characterization is also achieved using signals of mutually independent frequencies accompanied by minimal signal processing. Thus, improved defect detection capabilities are obtained.

摘要翻译： 公开了用于执行高密度无源板和衬底的测试和故障隔离的装置和方法。 使用少量移动探头，可以执行同时的网络电阻和网络电容测量。 因此，在普通电路板网络的测试期间，通过消除电气切换和/或过度的探头移动的需要来最小化测试时间。 使用相敏检测也可以实现网络电容和网络泄漏测量。 双频测量技术允许测量被测网络与未知网络之间的泄漏路径的电容值和电阻值。 被测网络和电路板内的接地或电源层之间的任何漏电阻也可以从测量中确定。 使用相互独立的频率的信号伴随着最小的信号处理也实现了同时独立的网络到平面电容表征。 因此，获得了改进的缺陷检测能力。

公开(公告)号：US4509530A

公开(公告)日：1985-04-09

申请号：US565499

申请日：1983-12-27

申请人： Huntington W. Curtis ,  Frederick A. Dodge ,  David B. Francis ,  John V. Mizzi

发明人： Huntington W. Curtis ,  Frederick A. Dodge ,  David B. Francis ,  John V. Mizzi

IPC分类号： A61B5/04 ,  A61B5/0432 ,  B41J3/407 ,  B41J5/30 ,  G01D9/00 ,  G06F3/12 ,  G06F17/00 ,  G06K15/00

CPC分类号： A61B5/0432 ,  A61B5/7232

摘要： A method of printing an analog waveform having a time variable, such as an ECG by first converting the analog waveform into a time sequence of digitally expressed values, forming predetermined groups of digital data and then determining maximum and minimum amplitude values of the digital data within the groups. These values are stored in a line buffer memory. A recording medium advances past a transversely oriented linear array of discrete recording elements, such as a linear array dot printhead. The serial stored values are read out in parallel to each of the recording elements, with the elements actuated in parallel by the stored values at an initial time and for time durations for each element that is a function of the stored maximum and minimum amplitude values for that element. The waveform is recorded as a series of appropriately placed short parallel longitudinal lines to form in aggregate a transverse waveform display on the recording medium.

摘要翻译： 一种通过首先将模拟波形转换为数字表示值的时间序列来打印具有诸如ECG的时间变量的模拟波形的方法，形成预定的数字数据组，然后确定数字数据的最大和最小幅度值 团体。 这些值存储在行缓冲存储器中。 记录介质经过离散记录元件的横向定向线性阵列，例如线性阵列点打印头。 串行存储值与每个记录元件并行地读出，其中元件通过初始时间的存储值并且对于作为存储的最大和最小振幅值的函数的每个元素的时间持续时间并行地存储， 那个元素。 波形被记录为一系列适当放置的短平行纵向线，以在记录介质上形成横向波形显示。

公开(公告)号：US5402351A

公开(公告)日：1995-03-28

申请号：US183512

申请日：1994-01-18

申请人： John S. Batchelder ,  Huntington W. Curtis ,  Douglas S. Goodman ,  Franklin Gracer ,  Robert R. Jackson ,  George M. Koppelman ,  John D. Mackay

发明人： John S. Batchelder ,  Huntington W. Curtis ,  Douglas S. Goodman ,  Franklin Gracer ,  Robert R. Jackson ,  George M. Koppelman ,  John D. Mackay

IPC分类号： B29C41/36 ,  B29C67/00 ,  G05B19/4099 ,  G06F17/50 ,  G06F15/46

CPC分类号： B29C67/0055 ,  B29C41/36 ,  B29C47/0866 ,  B29C67/0092 ,  G05B19/4099 ,  B29C47/0019 ,  G05B2219/37572 ,  G05B2219/49015 ,  Y02P90/265

摘要： Disclosed are methods and apparatus for fabricating a three-dimensional object in accordance with a computer-generated definition of the object that is stored within a memory. A method includes the steps of (a) evaluating the stored definition of the object to locate any un-supported features of the object; in response to locating an un-supported feature, (b) defining a support structure for the un-supported feature; (c) generating a fabrication tool movement list expressive of movements required by a fabrication tool to fabricate the object and any defined support structures; and (d) translating the fabrication tool in accordance with the generated fabrication tool movement list to fabricate the object and any defined support structures. The step of translating includes the steps of, generating a feedback signal that is indicative of at least one characteristic of a most recently fabricated portion of the object; and monitoring the feedback signal to detect a deviation of at least a location of the most recently fabricated portion of the object from a corresponding location as expressed in the associated portion of the fabrication tool movement list. Also disclosed are methods and apparatus for anti-aliasing aliased surface features of the object, representing the object definition in a vector format, generating a bit-mapped representation of the object, and an analysis of the definition of the object to identify and subsequently compensate for a region of the object that has a potential to retain heat during fabrication.

摘要翻译： 公开了根据计算机生成的存储在存储器内的对象的定义来制造三维物体的方法和装置。 一种方法包括以下步骤：（a）评估存储的对象的定义以定位对象的任何不支持的特征; 响应于定位未支撑的特征，（b）为所述不支持的特征定义支撑结构; （c）产生制造工具运动列表，其表达制造工具所需的运动以制造物体和任何限定的支撑结构; 以及（d）根据生成的制造工具移动列表翻译制造工具以制造物体和任何定义的支撑结构。 转换步骤包括以下步骤：产生指示物体的最近制造的部分的至少一个特征的反馈信号; 以及监视所述反馈信号以检测所述物体的最近制造的部分的至少一个位置与所述制造工具运动列表的相关联部分中表示的对应位置的偏差。 还公开了用于消除对象的混叠表面特征的方法和装置，以矢量格式表示对象定义，生成对象的位映射表示，以及对对象的定义的分析以识别和随后的补偿 对于在制造期间具有保持热量的潜力的物体的区域。

公开(公告)号：US5402072A

公开(公告)日：1995-03-28

申请号：US843672

申请日：1992-02-28

申请人： Shinwu Chiang ,  Huntington W. Curtis ,  Arthur E. Falls ,  Arnold Halperin ,  John P. Karidis ,  John D. Mackay ,  Danny C. Wong ,  Ka-Chiu Woo ,  Li-Cheng Zai

发明人： Shinwu Chiang ,  Huntington W. Curtis ,  Arthur E. Falls ,  Arnold Halperin ,  John P. Karidis ,  John D. Mackay ,  Danny C. Wong ,  Ka-Chiu Woo ,  Li-Cheng Zai

IPC分类号： G01R31/02 ,  G01R31/28 ,  G01R27/26

CPC分类号： G01R31/2805

摘要： Apparatus and method are disclosed for performing testing and fault isolation of high density passive boards (e.g. unpopulated circuit boards) and substrates. Using a small number of moving probes, simultaneous network resistance and network capacitance measurements may be performed. Thus, test time is minimized by eliminating the need for electrical switching and/or excessive probe movement during the test of a normal circuit board network. Simultaneous network capacitance and network leakage measurement are also achieved using phase-sensitive detection. Dual-frequency measurement techniques allow the measurement of both the capacitance value and resistance value of a leakage path between a network being measured and an unknown network. Any leakage resistance between a network under test and ground or power planes within the circuit board may also be determined from the measurements. Simultaneous independent net-to-plane capacitance characterization is also achieved using signals of mutually independent frequencies accompanied by minimal signal processing. Thus, improved defect detection capabilities are obtained.

摘要翻译： 公开了用于执行高密度无源板（例如未填充的电路板）和衬底的测试和故障隔离的装置和方法。 使用少量移动探头，可以执行同时的网络电阻和网络电容测量。 因此，在普通电路板网络的测试期间，通过消除电气切换和/或过度的探头移动的需要来最小化测试时间。 使用相敏检测也可以实现网络电容和网络泄漏测量。 双频测量技术允许测量被测网络与未知网络之间的泄漏路径的电容值和电阻值。 被测网络和电路板内的接地或电源层之间的任何漏电阻也可以从测量中确定。 使用相互独立的频率的信号伴随着最小的信号处理也实现了同时独立的网络到平面电容表征。 因此，获得了改进的缺陷检测能力。

公开(公告)号：US5303141A

公开(公告)日：1994-04-12

申请号：US34180

申请日：1993-03-22

申请人： John S. Batchelder ,  Huntington W. Curtis ,  Douglas S. Goodman ,  Franklin Gracer ,  Robert R. Jackson ,  George M. Koppelman ,  John D. Mackay

发明人： John S. Batchelder ,  Huntington W. Curtis ,  Douglas S. Goodman ,  Franklin Gracer ,  Robert R. Jackson ,  George M. Koppelman ,  John D. Mackay

IPC分类号： B29C41/36 ,  B29C67/00 ,  G05B19/4099 ,  G06F17/50 ,  G06F15/46

CPC分类号： B29C67/0055 ,  B29C41/36 ,  B29C47/0866 ,  B29C67/0092 ,  G05B19/4099 ,  B29C47/0019 ,  G05B2219/37572 ,  G05B2219/49015 ,  Y02P90/265

摘要： Apparatus and method for fabricating a three-dimensional object in accordance with a CAD-generated specification of the object. A closed-loop extrusion system (10) includes a nozzle (12) for extruding a material, such as a hot melt adhesive; apparatus (14, 18, 46) for controllably positioning the nozzle in accordance with the specification; and a sensor (60) for generating a feedback signal that is indicative of at least one characteristic of a most recently extruded portion of the material. Visual and non-visual feedback sensors may be employed, including optical sensors, infrared emission sensors, and proximity detection sensors. The specification of the object is converted to a bit-mapped representation thereof to improve accuracy relative to vector-based representations. Methods for determining a need for supporting structures and anti-aliasing features and for integrating the structures and features into the object specification are also disclosed.

摘要翻译： 根据CAD生成的对象规范制造三维物体的装置和方法。 闭环挤出系统（10）包括用于挤出材料的喷嘴（12），例如热熔粘合剂; 用于根据说明书可控地定位喷嘴的装置（14,18,46）; 以及用于产生指示材料的最近挤出部分的至少一个特性的反馈信号的传感器（60）。 可以采用视觉和非视觉反馈传感器，包括光学传感器，红外发射传感器和接近检测传感器。 将对象的规范转换为其位映射表示，以提高相对于基于矢量的表示的精度。 还公开了用于确定对支撑结构和抗混叠特征的需求以及用于将结构和特征集成到对象规范中的方法。