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    Direct Digital Radio Frequency Modulator
    2.
    发明申请
    Direct Digital Radio Frequency Modulator 审中-公开
    直接数字射频调制器

    公开(公告)号：US20160234048A1

    公开(公告)日：2016-08-11

    申请号：US14857589

    申请日：2015-09-17

    Applicant: IMEC VZW

    Inventor： Mark Ingels

    IPC: H04L27/12 ,  H03C3/02

    CPC classification number: H04L27/122 ,  H03C3/02 ,  H03K5/01 ,  H04B1/0007

    Abstract: The present disclosure relates to a direct digital radio frequency modulator that includes a plurality of input terminals arranged to receive a multi-bit digital signal, and a plurality of converter circuits. In one example, the converter circuits are arranged to receive at an input terminal one bit of the multi-bit digital signal and to provide at a converter circuit output terminal an analog signal in accordance to the one bit. In the present example, a converter circuit includes an input transistor arranged to receive the one bit for enabling the converter circuit to produce the analog signal, a current source transistor, an additional transistor in cascode to the current source transistor, and a frequency modulator output terminal connected to the output terminal of each converter circuit for providing an analog output signal.

    Abstract translation: 本公开涉及一种直接数字射频调制器，其包括布置成接收多位数字信号的多个输入端子和多个转换器电路。 在一个示例中，转换器电路被布置为在输入端子处接收多位数字信号的一位，并在转换器电路输出端提供根据该位的模拟信号。 在本示例中，转换器电路包括输入晶体管，其被配置为接收一位以使得转换器电路能够产生模拟信号，电流源晶体管，与电流源晶体管的共源共栅中的附加晶体管，以及频率调制器输出 端子连接到每个转换器电路的输出端以提供模拟输出信号。

    SWITCHING CIRCUIT
    4.
    发明申请
    SWITCHING CIRCUIT 有权
    切换电路

    公开(公告)号：US20170005654A1

    公开(公告)日：2017-01-05

    申请号：US15195707

    申请日：2016-06-28

    Applicant: IMEC VZW

    Inventor： Xiaoqiang Zhang ,  Mark Ingels

    IPC: H03K17/687 ,  H04L27/20 ,  H03M1/66

    CPC classification number: H03K17/687 ,  H03F1/086 ,  H03F1/14 ,  H03F1/3205 ,  H03F3/193 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2178 ,  H03F3/245 ,  H03F2200/231 ,  H03F2200/324 ,  H03F2200/336 ,  H03F2200/451 ,  H03F2200/519 ,  H03F2200/525 ,  H03F2200/61 ,  H03F2200/75 ,  H03K17/161 ,  H03K17/164 ,  H03K17/6292 ,  H03M1/0863 ,  H03M1/66 ,  H03M1/742 ,  H04L27/20

    Abstract: A conversion circuit is disclosed. In one aspect, the conversion circuit includes a first input terminal for receiving a digital signal. The conversion circuit includes a second input terminal for receiving a bias voltage signal. The conversion circuit includes an output terminal for outputting a current. The conversion circuit includes a first and a second switch transistor connected to the first input terminal for receiving the digital signal. The conversion circuit includes a first and a second current source transistor connected to the second input terminal for receiving the bias voltage signal. The conversion circuit further includes a first branch, wherein the first switch transistor is connected to the output terminal via the first current source transistor. The conversion circuit further includes a second branch, wherein the second current source transistor is connected to the output terminal via the second switch transistor.

    Abstract translation: 公开了一种转换电路。 一方面，转换电路包括用于接收数字信号的第一输入端。 转换电路包括用于接收偏置电压信号的第二输入端。 转换电路包括用于输出电流的输出端子。 转换电路包括连接到第一输入端的第一和第二开关晶体管，用于接收数字信号。 转换电路包括连接到第二输入端的第一和第二电流源晶体管，用于接收偏置电压信号。 转换电路还包括第一分支，其中第一开关晶体管经由第一电流源晶体管连接到输出端子。 转换电路还包括第二分支，其中第二电流源晶体管经由第二开关晶体管连接到输出端子。

    Delay Control Circuit
    5.
    发明申请
    Delay Control Circuit 审中-公开

    公开(公告)号：US20170179937A1

    公开(公告)日：2017-06-22

    申请号：US15292436

    申请日：2016-10-13

    Applicant: IMEC VZW

    Inventor： Jan Craninckx ,  Mark Ingels

    IPC: H03K5/13

    CPC classification number: H03K5/131 ,  H03K2005/00058 ,  H03K2005/00071 ,  H03K2005/0028 ,  H03K2005/00293

    Abstract: The present disclosure relates to a delay control circuit arranged for adding delay to a signal. The delay control circuit includes a driver circuit arranged to receive a first signal and to output a second signal. The driver circuit includes a variable load arranged for outputting the second signal by adding delay to the first signal. The delay control circuit also includes a control circuit arranged to receive the first signal and to control the variable load of the driver circuit based on a current state of the first signal and on a control signal indicative of an amount of delay to be added to the first signal in the current state.

    Front-End System for A Radio Device
    6.
    发明申请
    Front-End System for A Radio Device 有权
    无线电设备的前端系统

    公开(公告)号：US20160241424A1

    公开(公告)日：2016-08-18

    申请号：US15043768

    申请日：2016-02-15

    Applicant: IMEC VZW ,  Vrije Universiteit Brussel

    Inventor： Jan Craninckx ,  Mark Ingels ,  Pedro Emiliano Paro Filho

    IPC: H04L27/00 ,  H04B1/04

    CPC classification number: H04L27/0002 ,  H04B1/0475 ,  H04B1/0483 ,  H04B1/18 ,  H04B2001/0491

    Abstract: The present disclosure relates to a front-end system for a radio device comprising: a charge generator circuit arranged for receiving a digital baseband signal, a first converter circuit arranged for calculating at least one charge value based on the digital baseband signal, a second converter circuit arranged for converting the at least one charge value into at least one electrical charge, and a modulator circuit arranged for generating a radio frequency signal based on the at least one electrical charge and at least one local oscillator signal.

    Abstract translation: 本公开涉及一种无线电设备的前端系统，包括：电荷发生器电路，被布置为接收数字基带信号;第一转换器电路，被布置为基于数字基带信号计算至少一个电荷值;第二转换器 布置成用于将至少一个电荷值转换成至少一个电荷的电路;以及调制器电路，被布置为基于所述至少一个电荷和至少一个本地振荡器信号来产生射频信号。

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