-
公开(公告)号：US09722541B2
公开(公告)日：2017-08-01
申请号：US15045860
申请日：2016-02-17
Applicant: FUJITSU LIMITED
Inventor： Masaru Sato , Naoko Kurahashi
IPC: H03F3/60 , H03F1/02 , H03F1/18 , H03F1/42 , H03F3/193 , H03F3/195 , H03F3/72 , H03F1/56 , H03F1/07
CPC classification number: H03F1/0205 , H03F1/0288 , H03F1/07 , H03F1/18 , H03F1/42 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/604 , H03F3/607 , H03F3/72 , H03F2200/27 , H03F2200/315 , H03F2200/36 , H03F2200/42 , H03F2200/423 , H03F2200/451 , H03F2200/48 , H03F2200/519 , H03F2200/555 , H03F2200/75 , H03F2203/7227
Abstract: A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series M×N unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k−1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another.
-
公开(公告)号：US5250912A
公开(公告)日：1993-10-05
申请号：US891416
申请日：1992-05-29
Applicant: Noriyuki Fujita
Inventor： Noriyuki Fujita
CPC classification number: H03F3/601 , H03F1/0261 , H03F2200/165 , H03F2200/168 , H03F2200/171 , H03F2200/519 , H03F2200/75
Abstract: A radio frequency (RF) amplifier for amplifying an RF signal with a high power efficiency and with a minimum of signal distortions by using a GaAs field effect transistor (FET). An idling current for class "A" amplification is set in the FET. An output low pass filter is connected to the drain of the FET and provided with an impedance higher than a high gain impedance, so that the FET and a load may be matched in power during high RF signal operation, i.e., the dynamic impedance of the FET and the impedance of the load may be matched. A drain bias to the FET is turned on and turned off in synchronism with the ON/OFF of the input RF signal. The amplifier, therefore, not only performs class "A" amplification with a minimum of signal distortions but also further saves power since it is turned off in the absence of a signal, thereby achieving a higher power efficiency.
-
公开(公告)号：US20160261237A1
公开(公告)日：2016-09-08
申请号：US15045860
申请日：2016-02-17
Applicant: FUJITSU LIMITED
Inventor： Masaru Sato , Naoko Kurahashi
CPC classification number: H03F1/0205 , H03F1/0288 , H03F1/07 , H03F1/18 , H03F1/42 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/604 , H03F3/607 , H03F3/72 , H03F2200/27 , H03F2200/315 , H03F2200/36 , H03F2200/42 , H03F2200/423 , H03F2200/451 , H03F2200/48 , H03F2200/519 , H03F2200/555 , H03F2200/75 , H03F2203/7227
Abstract: A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series MxN unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k−1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another.
Abstract translation: 分布式放大器包括：输入侧传输线; M放大电路; M输出侧传输线; 以及组合电路，被配置为组合M个输出侧传输线的输出; 其中输入侧传输线具有通过串联连接包括相同线路长度的M×N个单元传输线和输入侧终端电阻而形成的输入侧串行线，M个放大电路各自包括N个放大器和N个放大器 将第（（k-1）M + i个）输入侧传输线的输入节点作为输入，并且输出侧传输线包括输出侧串行线，包括 N个传输线各自串联连接在N个放大器的相邻输出之间，并且每个具有线宽度，其中每个级中的放大器的输出的相位彼此一致。
-
公开(公告)号：US07945232B2
公开(公告)日：2011-05-17
申请号：US11769151
申请日：2007-06-27
Applicant: Yoshikazu Sugiyama , Satoshi Adachi , Yusaku Katsube , Masazumi Tone , Taku Takaki
Inventor： Yoshikazu Sugiyama , Satoshi Adachi , Yusaku Katsube , Masazumi Tone , Taku Takaki
IPC: H04B1/28
CPC classification number: H03F3/195 , H03F1/22 , H03F1/565 , H03F3/24 , H03F2200/108 , H03F2200/111 , H03F2200/294 , H03F2200/381 , H03F2200/387 , H03F2200/391 , H03F2200/451 , H03F2200/519 , H03F2200/75
Abstract: When switching over from a portable telephone system of 800 MHz band to a UWB communication system of 9 GHz band, depending upon a signal for changing over a high pass filter and a low pass filter, a reactance element, which is determined to be matching with a load Z of the high pass filter, is connected to an output terminal of a transmitting power amplifier. With this, it is possible to achieve a multi-band or multi-mode wireless receiver of using a frequency band from 800 MHz to 10 GHz, without an enlargement of a circuit scale and an increase of costs.
Abstract translation: 当从800MHz频带的便携式电话系统切换到9GHz频带的UWB通信系统时，根据用于切换高通滤波器和低通滤波器的信号，确定为匹配的电抗元件 高通滤波器的负载Z连接到发射功率放大器的输出端。 由此，可以实现使用800MHz至10GHz的频带的多频带或多模式无线接收机，而不会扩大电路规模并增加成本。
-
公开(公告)号：US20180061984A1
公开(公告)日：2018-03-01
申请号：US15250220
申请日：2016-08-29
Applicant: MACOM Technology Solutions Holdings, Inc.
Inventor： Benone Achiriloaie , Eric Hokenson
IPC: H01L29/78 , H01L29/20 , H01L29/866
CPC classification number: H01L29/7838 , H01L29/2003 , H01L29/866 , H03F1/025 , H03F1/0266 , H03F1/523 , H03F3/193 , H03F3/245 , H03F2200/12 , H03F2200/15 , H03F2200/18 , H03F2200/21 , H03F2200/222 , H03F2200/27 , H03F2200/297 , H03F2200/387 , H03F2200/42 , H03F2200/451 , H03F2200/471 , H03F2200/48 , H03F2200/519 , H03F2200/522 , H03F2200/555 , H03F2200/75 , H03F2200/99
Abstract: A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.
-
Patent Agency Ranking
公开(公告)号：US20180034431A1
公开(公告)日：2018-02-01
申请号：US15548371
申请日：2015-02-27
Applicant: TDK Corporation
Inventor： Gino Rocca , Tomasz Hanzlik
CPC classification number: H03G3/3026 , H03F1/0272 , H03F1/26 , H03F1/304 , H03F3/187 , H03F2200/03 , H03F2200/15 , H03F2200/24 , H03F2200/411 , H03F2200/511 , H03F2200/519 , H03F2200/525 , H04R3/00 , H04R29/004 , H04R2201/003
Abstract: An integrated circuit arrangement for a microphone, a microphone system and a method for adjusting circuit parameters of the microphone are disclosed. In an embodiment an integrated circuit includes an amplifier circuit with a first switchable network circuit for adjusting an amplifier current of the amplifier circuit, the first switchable network circuit comprising a plurality of switches (SW1, . . . ,SWx) each coupled with a first control port of the first switchable network circuit and a control unit coupled with the first control port of the first switchable network circuit and configured to control a setting of the respective switches (SW1, . . . ,SWx) of the first switchable network circuit.
-
公开(公告)号：US07990210B2
公开(公告)日：2011-08-02
申请号：US12093207
申请日：2007-09-04
Applicant: Sachio Iida , Atsushi Yoshizawa
Inventor： Sachio Iida , Atsushi Yoshizawa
IPC: H03F7/00
CPC classification number: H03F3/005 , H03F3/70 , H03F7/04 , H03F2200/507 , H03F2200/513 , H03F2200/519 , H03F2200/522 , H03F2200/525 , H03H19/004
Abstract: An amplifier is provided which includes: a first variable capacitance device of which capacitance is variable, a second variable capacitance device of which capacitance is variable, electrically connected to the first variable capacitance device, and of an inverse conductivity type from the first variable capacitance device, and a first input unit for selectively inputting a bias voltage and a voltage signal to the first variable capacitance device and the second variable capacitance device, wherein, in the event that the bias voltage and the voltage signal are input to the first variable capacitance device and the second variable capacitance device, the capacitance of the first variable capacitance device and the second variable capacitance device is taken as a first value, and wherein the voltage signal is amplified with the capacitance of the first variable capacitance device and the second variable capacitance device as a second value smaller than the first value.
Abstract translation: 提供一种放大器，其包括：电容变化的第一可变电容器件，电容可变的第二可变电容器件，电连接到第一可变电容器件，以及来自第一可变电容器件的反向导电型 以及第一输入单元，用于选择性地将偏置电压和电压信号输入到第一可变电容器件和第二可变电容器件，其中，在偏置电压和电压信号被输入到第一可变电容器件的情况下 和第二可变静电电容元件，将第一可变静电电容元件和第二可变静电电容元件的电容作为第一值，其中电压信号用第一可变静电电容元件和第二可变电容元件的电容放大 作为小于第一值的第二值。
-
公开(公告)号：US20180323821A1
公开(公告)日：2018-11-08
申请号：US15968927
申请日：2018-05-02
Applicant: STMicroelectronics SA
Inventor： Laurent CHABERT , Raphael PAULIN
CPC classification number: H04B1/48 , H03F1/26 , H03F1/523 , H03F3/195 , H03F3/72 , H03F2200/06 , H03F2200/114 , H03F2200/181 , H03F2200/222 , H03F2200/231 , H03F2200/27 , H03F2200/294 , H03F2200/321 , H03F2200/396 , H03F2200/451 , H03F2200/489 , H03F2200/507 , H03F2200/519 , H03F2200/525 , H03F2200/61 , H03F2200/75 , H04B1/1615 , H04B1/18
Abstract: A communications device includes a transmission chain coupled to an antenna a receiver chain coupled to the antenna. The receiver chain includes an amplifier device having an input coupled to the antenna. A controlled switching circuit is included in the amplifier device and is operable to selectively disconnect conduction terminals of an amplifying transistor from power supply terminals when the transmission chain is operating to pass a transmit signal to the antenna.
-
公开(公告)号：US09748951B2
公开(公告)日：2017-08-29
申请号：US15195707
申请日：2016-06-28
Applicant: IMEC VZW
Inventor： Xiaoqiang Zhang , Mark Ingels
IPC: H04L27/12 , H03K17/687 , H03F1/08 , H03F1/14 , H03F1/32 , H03F3/193 , H03F3/21 , H03F3/217 , H03F3/24 , H03M1/66 , H04L27/20 , H03K17/16 , H03K17/62 , H03M1/08 , H03M1/74
CPC classification number: H03K17/687 , H03F1/086 , H03F1/14 , H03F1/3205 , H03F3/193 , H03F3/211 , H03F3/2171 , H03F3/2178 , H03F3/245 , H03F2200/231 , H03F2200/324 , H03F2200/336 , H03F2200/451 , H03F2200/519 , H03F2200/525 , H03F2200/61 , H03F2200/75 , H03K17/161 , H03K17/164 , H03K17/6292 , H03M1/0863 , H03M1/66 , H03M1/742 , H04L27/20
Abstract: A conversion circuit is disclosed. In one aspect, the conversion circuit includes a first input terminal for receiving a digital signal. The conversion circuit includes a second input terminal for receiving a bias voltage signal. The conversion circuit includes an output terminal for outputting a current. The conversion circuit includes a first and a second switch transistor connected to the first input terminal for receiving the digital signal. The conversion circuit includes a first and a second current source transistor connected to the second input terminal for receiving the bias voltage signal. The conversion circuit further includes a first branch, wherein the first switch transistor is connected to the output terminal via the first current source transistor. The conversion circuit further includes a second branch, wherein the second current source transistor is connected to the output terminal via the second switch transistor.
-
公开(公告)号：US20170005654A1
公开(公告)日：2017-01-05
申请号：US15195707
申请日：2016-06-28
Applicant: IMEC VZW
Inventor： Xiaoqiang Zhang , Mark Ingels
IPC: H03K17/687 , H04L27/20 , H03M1/66
CPC classification number: H03K17/687 , H03F1/086 , H03F1/14 , H03F1/3205 , H03F3/193 , H03F3/211 , H03F3/2171 , H03F3/2178 , H03F3/245 , H03F2200/231 , H03F2200/324 , H03F2200/336 , H03F2200/451 , H03F2200/519 , H03F2200/525 , H03F2200/61 , H03F2200/75 , H03K17/161 , H03K17/164 , H03K17/6292 , H03M1/0863 , H03M1/66 , H03M1/742 , H04L27/20
Abstract: A conversion circuit is disclosed. In one aspect, the conversion circuit includes a first input terminal for receiving a digital signal. The conversion circuit includes a second input terminal for receiving a bias voltage signal. The conversion circuit includes an output terminal for outputting a current. The conversion circuit includes a first and a second switch transistor connected to the first input terminal for receiving the digital signal. The conversion circuit includes a first and a second current source transistor connected to the second input terminal for receiving the bias voltage signal. The conversion circuit further includes a first branch, wherein the first switch transistor is connected to the output terminal via the first current source transistor. The conversion circuit further includes a second branch, wherein the second current source transistor is connected to the output terminal via the second switch transistor.
Abstract translation: 公开了一种转换电路。 一方面，转换电路包括用于接收数字信号的第一输入端。 转换电路包括用于接收偏置电压信号的第二输入端。 转换电路包括用于输出电流的输出端子。 转换电路包括连接到第一输入端的第一和第二开关晶体管，用于接收数字信号。 转换电路包括连接到第二输入端的第一和第二电流源晶体管，用于接收偏置电压信号。 转换电路还包括第一分支，其中第一开关晶体管经由第一电流源晶体管连接到输出端子。 转换电路还包括第二分支，其中第二电流源晶体管经由第二开关晶体管连接到输出端子。
-
-
-
-
-
-
-
-
-
Search Results
12
records
(took 0.013 seconds)
