Configurable write command delay in nonvolatile memory

    公开(公告)号:US11188264B2

    公开(公告)日:2021-11-30

    申请号:US16780632

    申请日:2020-02-03

    Abstract: A memory system includes a nonvolatile (NV) memory device with asymmetry between intrinsic read operation delay and intrinsic write operation delay. The system can select to perform memory access operations with the NV memory device with the asymmetry, in which case write operations have a lower delay than read operations. The system can alternatively select to perform memory access operations with the NV memory device where a configured write operation delay that matches the read operation delay.

    TIME TRACKING WITH PATROL SCRUB
    4.
    发明申请

    公开(公告)号:US20190102320A1

    公开(公告)日:2019-04-04

    申请号:US15721379

    申请日:2017-09-29

    Abstract: One embodiment provides a memory controller. The memory controller includes a memory controller memory; a timestamp circuitry and a demarcation voltage (VDM) selection circuitry. The timestamp circuitry is to capture a current timer index from a timer circuitry in response to an initiation of a periodic patrol scrub and to compare the current timer index to a stored timestamp. The VDM selection circuitry is to update a state of a sub-block of a memory array, if the state is less than a threshold and a difference between the current timer index and the stored timestamp is nonzero. The timestamp circuitry is further to store the current timer index as a new timestamp.

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